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參數(shù)資料
| 型號： | MAX105EVKIT |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 6/21頁 |
| 文件大小： | 0K |
| 描述： | KIT EVAL FOR MAX105 AND MAX107 |
| 產(chǎn)品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 1 |
| ADC 的數(shù)量： | 2 |
| 位數(shù)： | 6 |
| 采樣率（每秒）： | 800M |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 輸入范圍： | 800 mVpp |
| 在以下條件下的電源（標準）： | 2.6W @ 800MSPS |
| 工作溫度： | -40°C ~ 85°C |
| 已用 IC / 零件： | MAX105，MAX107 |
| 已供物品： | 板 |
MAX105
and are internally buffered with a preamplifier to ensure
proper operation of the converter even with small-
amplitude sine-wave sources. The MAX105 was
designed for single-ended, low-phase noise sine wave
clock signals with as little as 500mVP-P amplitude
(-2dBm).
Single-Ended Clock (Sine-Wave Drive)
Excellent performance is obtained by AC- or DC-cou-
pling a low-phase noise sine-wave source into a single
clock input (Figure 4). Essentially, the dynamic perfor-
mance of the converter is unaffected by clock-drive
power levels from -2dBm (500mVp-p clock signal ampli-
tude) to +10dBm (2VP-P clock signal amplitude). The
MAX105 dynamic performance specifications are
determined by a single-ended clock drive of -2dBm
(500mVp-p clock signal amplitude). To avoid saturation
of the input amplifier stage, limit the clock power level
to a maximum of +10dBm.
Differential Clock (Sine-Wave Drive)
The advantages of differential clock drive (Figure 5)
can be obtained by using an appropriate balun or
transformer to convert single-ended sine-wave sources
into differential drives. Refer to Single-Ended Clock
Inputs (Sine-Wave Drive) for proper input amplitude
requirements.
LVDS, ECL and PECL Clock
The innovative input architecture of the MAX105 clock
also allows these inputs to be driven by LVDS-, ECL-, or
PECL-compatible input levels, ranging from 500mVp-p
to 2Vp-p (Figure 6).
Timing Requirements
The MAX105 features a 6:12 demultiplexer, which
reduces the output data rate (including DREADY and
DOR signals) to one-half of the sample clock rate. The
Dual, 6-Bit, 800Msps ADC with On-Chip,
Wideband Input Amplifier
14
______________________________________________________________________________________
AGND
B
0
°
0
°
180
°
0
°
D
C
A
SIGNAL SOURCE
50
*TERMINATION OF THE UNUSED INPUT/OUTPUT (WITH 50
TO AGND) ON A
BALUN IS RECOMMENDED IN ORDER TO AVOID UNWANTED REFLECTIONS.
CLK+,
INI+,
INQ+
CLK-,
INI-,
INQ-
100pF
50
50
AGND
50
*
Figure 3. Single-Ended to Differential Conversion Using a Balun
AGND
FROM SIGNAL SOURCE
CLK+,
INI+,
INQ+
CLK-,
INI-,
INQ-
100pF
50
Figure 4. Single-Ended Clock Input With AC-Coupled Input
Drive (CLK, INI, INQ)
Figure 5. Differential AC-Coupled Input Drive (CLK, INI, INQ)
AGND
50
TRANSMISSION LINES
TO 50
-TERMINATED
SIGNAL SOURCE
OR BALUM
CLK+,
INI+,
INQ+
CLK-,
INI-,
INQ-
100pF
50
50
50
TRANSMISSION LINES
LVDS LINE DRIVER
SIGNAL
SOURCE
INPUT
CLK+,
INI+,
INQ+
CLK-,
INI-,
INQ-
100pF
100
Figure 6. LVDS Input Drive (CLK, INI, INQ)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX106 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:【5V, 600Msps, 8-Bit ADC with On-Chip 2.2GHz Bandwidth Track/Hold Amplifier |
| MAX1060 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:400ksps, +5V, 8-/4-Channel, 10-Bit ADCs with +2.5V Reference and Parallel Interface |
| MAX1060ACEI | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX1060ACEI+ | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 5V 10Bit 8Ch 400ksps w/2.5V Ref & Prl Int RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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