參數(shù)資料
型號: MAX11621EEE+T
廠商: Maxim Integrated Products
文件頁數(shù): 16/21頁
文件大?。?/td> 0K
描述: IC ADC 10BIT 4CH 16QSOP
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 2,500
位數(shù): 10
采樣率(每秒): 300k
數(shù)據(jù)接口: MICROWIRE?,QSPI?,串行,SPI?
轉換器數(shù)目: 1
功率耗散(最大): 667mW
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-SSOP(0.154",3.90mm 寬)
供應商設備封裝: 16-QSOP
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 8 個單端,單極
MAX11618–MAX11621/MAX11624/MAX11625
10-Bit, 300ksps ADCs
with FIFO and Internal Reference
4
_______________________________________________________________________________________
Note 2: Limits at TA = -40°C are guaranteed by design and not production tested.
Note 3: MAX11619/MAX11621/MAX11625 tested at VDD = +3V. MAX11618/MAX11620/MAX11624 tested at VDD = +5V.
Note 4: Offset nulled.
Note 5: Time for reference to power up and settle to within 1 LSB.
Note 6: Conversion time is defined as the number of clock cycles multiplied by the clock period; clock has 50% duty cycle.
Note 7: See Figure 3 (Equivalent Input Circuit) and the Sampling Error vs. Source Impedance curve in the
Typical Operating
Characteristics section.
Note 8: When CNVST is configured as a digital input, do not apply a voltage between VIL and VIH.
Note 9: Supply current is specified depending on whether an internal or external reference is used for voltage conversions.
ELECTRICAL CHARACTERISTICS (continued)
(VDD = 2.7V to 3.6V (MAX11619/MAX11621/MAX11625); VDD = 4.75V to 5.25V (MAX11618/MAX11620/MAX11624),
fSAMPLE = 300kHz, fSCLK = 4.8MHz (external clock, 50% duty cycle), VREF = 2.5V (MAX11619//MAX11621/MAX11625); VREF = 4.096V
(MAX11618/MAX11620/MAX11624), TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DIGITAL INPUTS (SCLK, DIN,
CS, CNVST) (Note 8)
MAX11618/MAX11620/MAX11624
0.8
Input-Voltage Low
VIL
MAX11619/MAX11621/MAX11625
VDD x 0.3
V
MAX11618/MAX11620/MAX11624
2.0
Input-Voltage High
VIH
MAX11619/MAX11621/MAX11625
VDD x 0.7
V
Input Hysteresis
VHYST
200
mV
Input Leakage Current
IIN
VIN = 0V or VDD
±0.01
±1.0
A
Input Capacitance
CIN
15
pF
DIGITAL OUTPUTS (DOUT,
EOC)
ISINK = 2mA
0.4
Output-Voltage Low
VOL
ISINK = 4mA
0.8
V
Output-Voltage High
VOH
ISOURCE = 1.5mA
VDD - 0.5
V
Three-State Leakage Current
IL
CS = VDD
±0.05
±1
A
Three-State Output
COUT
CS = VDD
15
pF
POWER REQUIREMENTS
MAX11618/MAX11620/MAX11624
4.75
5.25
Supply Voltage
VDD
MAX11619/MAX11621/MAX11625
2.7
3.6
V
fSAMPLE = 300ksps
1750
2000
fSAMPLE = 0, REF on
1000
1200
Internal reference
Shutdown
0.2
5
fSAMPLE = 300ksps
1050
1200
MAX11619/MAX11621/
MAX11625 Supply Current
(Note 9)
IDD
External reference
Shutdown
0.2
5
A
fSAMPLE = 300ksps
2300
2550
fSAMPLE = 0, REF on
1000
1350
Internal reference
Shutdown
0.2
5
fSAMPLE = 300ksps
1550
1700
MAX11618/MAX11620/
MAX11624 Supply Current
(Note 9)
IDD
External reference
Shutdown
0.2
5
A
VDD = 2.7V to 3.6V, full-scale input
±0.2
±1
Power-Supply Rejection
PSR
VDD = 4.75V to 5.25V, full-scale input
±0.2
±1.4
mV
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