參數(shù)資料
型號: MAX11621EEE+T
廠商: Maxim Integrated Products
文件頁數(shù): 2/21頁
文件大?。?/td> 0K
描述: IC ADC 10BIT 4CH 16QSOP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 2,500
位數(shù): 10
采樣率(每秒): 300k
數(shù)據(jù)接口: MICROWIRE?,QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 667mW
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-SSOP(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 16-QSOP
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 8 個單端,單極
MAX11618–MAX11621/MAX11624/MAX11625
10-Bit, 300ksps ADCs
with FIFO and Internal Reference
10
______________________________________________________________________________________
Pin Description
PIN
MAX11618
MAX11619
(4 CHANNELS)
MAX11620
MAX11621
(8 CHANNELS)
MAX11624
MAX11625
(16 CHANNELS)
NAME
FUNCTION
1–4
AIN0–AIN3
Analog Inputs
5, 6, 7
N.C.
No Connection. Not internally connected.
1–15
AIN0–AIN14
Analog Inputs
1–7
AIN0–AIN6
Analog Inputs
——
16
CNVST/AIN15
Active-Low Conversion Start Input/Analog Input 15. See
Table 3 for details on programming the setup register.
—8
CNVST/AIN7
Active-Low Conversion Start Input/Analog Input 7. See Table
3 for details on programming the setup register.
8—
CNVST
Active-Low Conversion Start Input. See Table 3 for details on
programming the setup register.
9
17
REF
Reference Input. Bypass to GND with a 0.1F capacitor.
10
18
GND
Ground
11
19
VDD
Power Input. Bypass to GND with a 0.1F capacitor.
12
20
CS
Active-Low Chip-Select Input. When CS is low, the serial
interface is enabled. When CS is high, DOUT is high
impedance.
13
21
SCLK
Serial Clock Input. Clocks data in and out of the serial
interface (duty cycle must be 40% to 60%). See Table 3 for
details on programming the clock mode.
14
22
DIN
Serial Data Input. DIN data is latched into the serial interface
on the rising edge of SCLK.
15
23
DOUT
Serial Data Output. Data is clocked out on the falling edge of
SCLK. High impedance when CS is connected to VDD.
16
24
EOC
End of Conversion Output. Data is valid after EOC pulls low.
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
AIN0
TOP VIEW
EOC
DOUT
DIN
CS
SCLK
VDD
GND
REF
MAX11618–
MAX11621
QSOP
AIN1
AIN2
AIN5 (N.C.)
AIN3
AIN4 (N.C.)
AIN6 (N.C.)
AIN7/(CNVST)
() MAX11618/MAX11619 ONLY
+
24
23
22
21
20
19
18
17
2
1
3
4
5
6
7
8
EOC
DOUT
DIN
CS
AIN3
AIN2
AIN1
AIN0
SCLK
VDD
GND
REF
AIN7
AIN6
AIN5
AIN4
16
15
14
13
9
10
11
12
AIN14
CNVST/AIN15
AIN13
AIN12
AIN11
AIN10
AIN9
AIN8
QSOP
MAX11624–
MAX11625
+
Pin Configurations
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