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參數(shù)資料
| 型號(hào)： | MAX1247BMJE |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | ADC |
| 英文描述： | +2.7V, Low-Power, 4-Channel, Serial 12-Bit ADCs in QSOP-16 |
| 中文描述： | 4-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, CDIP16 |
| 封裝： | CERDIP-16 |
| 文件頁數(shù)： | 14/24頁 |
| 文件大?。?/td> | 223K |
| 代理商： | MAX1247BMJE |
M
+2.7V, Low-Power, 4-Channel,
S erial 12-Bit ADCs in QS OP-16
14
______________________________________________________________________________________
SCLK
DIN
DOUT
CS
S
CONTROL BYTE 0
CONTROL BYTE 1
S
CONVERSION RESULT 0
B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
CONVERSION RESULT 1
SSTRB
B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
CONTROL BYTE 2
S
1
8
1
15
15
8
1
CS
SCLK
DIN
DOUT
S
1
8
16
1
8
16
CONTROL BYTE 0
CONTROL BYTE 1
S
CONVERSION RESULT 0
B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
B11 B10 B9 B8
CONVERSION RESULT 1
Figure 10a. External Clock Mode, 15 Clocks/Conversion Timing
Figure 10b. External Clock Mode, 16 Clocks/Conversion Timing
The fastest the MAX1246/MAX1247 can run with
CS
held
low between conversions is 15 clocks per conversion.
Figure 10a shows the serial-interface timing necessary to
perform a conversion every 15 SCLK cycles in external
clock mode. If
CS
is tied low and SCLK is continuous,
guarantee a start bit by first clocking in 16 zeros.
Most microcontrollers (μCs) require that conversions
occur in multiples of 8 SCLK clocks; 16 clocks per con-
version is typically the fastest that a μC can drive the
MAX1246/MAX1247. Figure 10b shows the serial-
interface timing necessary to perform a conversion every
16 SCLK cycles in external clock mode.
PD0 CLOCK IN
t
SSTRB
t
CSH
t
CONV
t
SCK
SSTRB
SCLK
DOUT
t
CSS
t
DO
NOTE: FOR BEST NOISE PERFORMANCE, KEEP SCLK LOW DURING CONVERSION.
CS
Figure 9. Internal Clock Mode SSTRB Detailed Timing
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| MAX1247CCEE | 制造商:Rochester Electronics LLC 功能描述: 制造商:Maxim Integrated Products 功能描述: |
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