參數(shù)資料
型號(hào)： MAX148
廠商： Maxim Integrated Products, Inc.
英文描述： +2.7V to +5.25V, Low-Power, 8-Channel, Serial 10-Bit ADCs(8通道，133ksps，串行10位A/D轉(zhuǎn)換器)
中文描述： +2.7V至+5.25V、低功耗、8通道、串行10位ADC
文件頁(yè)數(shù)： 11/20頁(yè)
文件大小： 200K
代理商： MAX148
M
+2.7V, Low-Power, 8-Channel,
S erial 10-Bit ADC
______________________________________________________________________________________
11
CS
SCLK
DIN
DOUT
t
CSH
t
CSS
t
CL
t
DS
t
DH
t
DV
t
CH
t
DO
t
TR
t
CSH
t
SDV
t
SSTRB
PD0 CLOCKED IN
t
STR
SSTRB
SCLK
CS
t
SSTRB
Figure 7. Detailed Serial-Interface Timing
Figure 8. External-Clock-Mode SSTRB Detailed Timing
The conversion must complete in some minimum time, or
droop on the sample-and-hold capacitors may degrade
conversion results. Use internal clock mode if the serial
clock frequency is less than 100kHz, or if serial-clock
interruptions could cause the conversion interval to
exceed 120μs.
Internal Clock
In internal clock mode, the MAX148 generates its own
conversion clock internally. This frees the μP from the
burden of running the SAR conversion clock and allows
the conversion results to be read back at the proces-
sor’s convenience, at any clock rate from zero to 2MHz.
SSTRB goes low at the start of the conversion and then
goes high when the conversion is complete. SSTRB will
be low for a maximum of 7.5μs (
SHDN
= FLOAT), dur-
ing which time SCLK should remain low for best noise
performance.
An internal register stores data when the conversion is
in progress. SCLK clocks the data out of this register at
any time after the conversion is complete. After SSTRB
goes high, the next falling clock edge will produce the
MSB of the conversion at DOUT, followed by the
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