參數(shù)資料
型號: MAX19515ETM+T
廠商: Maxim Integrated Products
文件頁數(shù): 30/35頁
文件大?。?/td> 0K
描述: IC ADC 10BIT 2CH 65MSPS 48TQFN
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
位數(shù): 10
采樣率(每秒): 65M
數(shù)據(jù)接口: 串行,并聯(lián)
轉(zhuǎn)換器數(shù)目: 2
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 48-TQFN-EP(7x7)
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 4 個單端,單極;2 個差分,單極
MAX19515
Dual-Channel, 10-Bit, 65Msps ADC
4
_______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(VAVDD = VOVDD = 1.8V, internal reference, differential clock, VCLK = 1.5VP-P, fCLK = 65MHz, AIN = -0.5dBFS, data output termination
= 50
, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
INTERCHANNEL CHARACTERISTICS
fINA or fINB = 70MHz at -1dBFS
95
Crosstalk
fINA or fINB = 175MHz at -1dBFS
85
dBc
Gain Match
fIN = 70MHz
±0.05
dB
Offset Match
fIN = 70MHz
±0.1
%FSR
Phase Match
fIN = 70MHz
±0.5
Degrees
ANALOG OUTPUTS (CMA, CMB)
CMA, CMB Output Voltage
VCOM
Default programmable setting
0.85
0.9
0.95
V
INTERNAL REFERENCE
REFIO Output Voltage
VREFOUT
1.23
1.25
1.27
V
REFIO Temperature Coefficient
TCREF
< ±60
ppm/°C
EXTERNAL REFERENCE
REFIO Input-Voltage Range
VREFIN
1.25 +5/
-10%
V
REFIO Input Resistance
RREFIN
10
±20%
k
CLOCK INPUTS (CLK+, CLK-)—DIFFERENTIAL MODE
Differential Clock Input Voltage
0.4 to 2.0
VP-P
Self-biased
1.2
Differential Input Common-Mode
Voltage
DC-coupled clock signal
1.0 to 1.4
V
Differential, default
10
k
Differential, internal termination selected
100
Input Resistance
RCLK
Common mode
9
k
Input Capacitance
CCLK
To ground, each input
3
pF
CLOCK INPUTS (CLK+, CLK-)—SINGLE-ENDED MODE (VCLK- < 0.1V)
Single-Ended Mode Selection
Threshold (VCLK-)
0.1
V
Allowable Logic Swing (VCLK+)
0 - VAVDD
V
Single-Ended Clock Input High
Threshold (VCLK+)
1.5
V
Single-Ended Clock Input Low
Threshold (VCLK+)
0.3
V
VCLK+ = VAVDD = 1.8V or 3.3V
+0.5
Input Leakage (CLK+)
VCLK+ = 0V
-0.5
A
Input Leakage (CLK-)
VCLK- = 0V
-150
-50
A
Input Capacitance (CLK+)
3pF
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