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參數(shù)資料
| 型號： | MAX195BCPE+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 7/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 16BIT 85KSPS SHTDN 16-DIP |
| 產(chǎn)品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 25 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 85k |
| 數(shù)據(jù)接口： | QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 功率耗散（最大）： | 80mW |
| 電壓電源： | 模擬和數(shù)字，雙 ± |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 16-DIP（0.300"，7.62mm） |
| 供應(yīng)商設(shè)備封裝： | 16-PDIP |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 1 個單端，單極；1 個單端，雙極 |
| 產(chǎn)品目錄頁面： | 1393 (CN2011-ZH PDF) |
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Digital Noise
Digital noise can easily be coupled to AIN and REF. The
conversion clock (CLK) and other digital signals that are
active during input acquisition contribute noise to the con-
version result. If the noise signal is synchronous to the
sampling interval, an effective input offset is produced.
Asynchronous signals produce random noise on the input,
whose high-frequency components may be aliased into
the frequency band of interest. Minimize noise by present-
ing a low impedance (at the frequencies contained in the
noise signal) at the inputs. This requires bypassing AIN to
AGND, or buffering the input with an amplifier that has a
small-signal bandwidth of several megahertz, or prefer-
ably both. AIN has a bandwidth of about 16MHz.
Offsets resulting from synchronous noise (such as the
conversion clock) are canceled by the MAX195’s cali-
bration scheme. However, because the magnitude of
the offset produced by a synchronous signal depends
on the signal’s shape, recalibration may be appropriate
if the shape or relative timing of the clock or other digi-
tal signals change, as might occur if more than one
clock signal or frequency is used.
Distortion
Avoid degrading dynamic performance by choosing an
amplifier with distortion much less than the MAX195’s
THD (-97dB, or 0.0014%) at frequencies of interest. If
the chosen amplifier has insufficient common-mode
rejection, which results in degraded THD performance,
use the inverting configuration (positive input ground-
ed) to eliminate errors from this source. Low tempera-
ture-coefficient, gain-setting resistors reduce linearity
errors caused by resistance changes due to self-heat-
ing. Also, to reduce linearity errors due to finite amplifier
gain, use an amplifier circuit with sufficient loop gain at
the frequencies of interest (Figures 14, 15, 16).
DC Accuracy
If DC accuracy is important, choose a buffer with an
offset much less than the MAX195’s maximum offset
(±3LSB = ±366V for a ±4V input range), or whose
offset can be trimmed while maintaining good stability
over the required temperature range.
Recommended Circuits
Figure 14 shows a good circuit for DC and low-frequen-
cy use. The MAX400 has very low offset (10V) and
drift (0.2V/°C), and low voltage noise (10nV/
√Hz) as
well. However, its gain-bandwidth product (GBW) is
much too low to drive AIN directly, so the analog input
is bypassed to present a low impedance at high fre-
quencies. The large bypass capacitor is isolated from
the amplifier output by a 100
resistor, which provides
additional noise filtering. Since the ±15V supplies
exceed the AIN range, add protection diodes at AIN
(see
REF and AIN Input Protection section).
Figure 15 shows a wide-bandwidth amplifier (MAX427)
driving a wideband video buffer, which is capable of
driving AIN and a small bypass capacitor (for noise
reduction) directly. The video buffer is inside the
MAX427’s feedback loop, providing good DC accura-
cy, while the buffer’s low output impedance and high-
current capability provide good AC performance. AIN is
diode-clamped to the ±5V rails to prevent overvoltage.
The MAX427’s 15V maximum offset voltage, 0.8V/°C
maximum drift, and less than 5nV/
√Hz noise specifica-
tions make this an excellent choice for AC/DC use.
MAX195
16-Bit, 85ksps ADC with 10A Shutdown
______________________________________________________________________________________
15
MAX427
4
7
6
2
3
IN
+15V
-15V
0.0033
F
0.1
F
0.1
F
ELANTEC
EL2003
4
1
7
+15V
-15V
0.1
F
0.1
F
100pF
1k
1N914
+5V
-5V
AIN
10
Figure 15. AIN Buffer for AC/DC Use
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX195BCPE+ | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 16-Bit 85ksps 5V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX195BCPE+T | 制造商:Maxim Integrated Products 功能描述:16-BIT, 85KSPS ADC WITH 10UA SHUTDOWN - Tape and Reel |
| MAX195BCWE | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX195BCWE+ | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 16-Bit 85ksps 5V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX195BCWE+T | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 16-Bit 85ksps 5V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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