參數(shù)資料
型號： MAX195BCPE+
廠商： Maxim Integrated Products
文件頁數(shù)： 9/28頁
文件大?。?/td> 0K
描述： IC ADC 16BIT 85KSPS SHTDN 16-DIP
產(chǎn)品培訓模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝： 25
位數(shù)： 16
采樣率（每秒）： 85k
數(shù)據(jù)接口： QSPI?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 2
功率耗散（最大）： 80mW
電壓電源： 模擬和數(shù)字，雙 ±
工作溫度： 0°C ~ 70°C
安裝類型： 通孔
封裝/外殼： 16-DIP（0.300"，7.62mm）
供應商設備封裝： 16-PDIP
包裝： 管件
輸入數(shù)目和類型： 1 個單端，單極；1 個單端，雙極
產(chǎn)品目錄頁面： 1393 (CN2011-ZH PDF)
If clocking data in on the falling edge (CPOL = 0,
CPHA = 1), the maximum CLK rate is given by:
Do not exceed the maximum CLK frequency given in
the
Electrical Characteristics table. To clock data in on
the falling edge, your processor hold time must not
exceed tCD minimum (100ns).
While QSPI can provide the required 20 CLK cycles as
two continuous 10-bit transfers, SPI is limited to 8-bit
transfers. This means that with SPI, a conversion must
consist of three 8-bit transfers. Ensure that the pauses
between 8-bit operations at your selected clock rate
are short enough to maintain a 20ms or shorter conver-
sion time, or the leakage of the capacitive DAC may
cause errors.
Complete source code for the Motorola 68HC16 and
the MAX195 evaluation kit (EV kit) using this mode is
available with the MAX195 EV kit.
Mode 2 (Asynchronous Data Transfer)
This mode uses a conversion clock (CLK) and a serial
clock (SCLK). The serial data is clocked out between
conversions, which reduces the maximum throughput
for high CLK rates, but may be more convenient for
some applications. Figure 19 is a block diagram with a
QSPI processor (Motorola 68HC16) connected to the
MAX195. Figure 20 shows the associated timing dia-
gram. Figure 21 gives an assembly language listing for
this arrangement.
f
=
1
t
+ t
CLK(max)
CD
SD
MAX195
16-Bit, 85ksps ADC with 10A Shutdown
______________________________________________________________________________________
17
EOC
CLK
tCD
tDV
DATA LATCHED:
tDH
CS, CONV
DOUT
B15 FROM PREVIOUS
CONVERSION
B15
B2
B14
B1
B0
MAX195
QSPI
GPT
BP/UP/SHDN
SCLK
EOC
DOUT
RESET
CONV
1.7MHz
CLK
IC3
CS
OC3
SCK
IC1
MISO
OC2
START
PCS0
1.3
s
74HC32
Figure 19. MAX195 Connection to QSPI Processor Clocking
Data Out with SCLK Between Conversions
Figure 18. Timing Diagram for Circuit of Figure 17 (Mode 1)
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相關代理商/技術參數(shù)
參數(shù)描述
MAX195BCPE+ 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 16-Bit 85ksps 5V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
MAX195BCPE+T 制造商:Maxim Integrated Products 功能描述:16-BIT, 85KSPS ADC WITH 10UA SHUTDOWN - Tape and Reel
MAX195BCWE 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
MAX195BCWE+ 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 16-Bit 85ksps 5V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
MAX195BCWE+T 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 16-Bit 85ksps 5V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
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