參數(shù)資料
型號： MAX19707ETM+T
廠商： Maxim Integrated Products
文件頁數(shù)： 35/37頁
文件大?。?/td> 0K
描述： IC ANLG FRNT END 48-TQFN
產(chǎn)品培訓模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝： 2,500
位數(shù)： 10
通道數(shù)： 4
功率（瓦特）： 84.6mW
電壓 - 電源，模擬： 3V
電壓 - 電源，數(shù)字： 3V
封裝/外殼： 48-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 48-TQFN-EP（7x7）
包裝： 帶卷 (TR)
MAX19707
10-Bit, 45Msps, Ultra-Low-Power
Analog Front-End
_______________________________________________________________________________________
7
ELECTRICAL CHARACTERISTICS (continued)
(VDD = 3V, OVDD = 1.8V, internal reference (1.024V), CL
≈ 10pF on all digital outputs, fCLK = 45MHz (50% duty cycle), Rx ADC input
amplitude = -0.5dBFS, Tx DAC output amplitude = 0dBFS, differential Rx ADC input, differential Tx DAC output, CREFP = CREFN =
CCOM = 0.33F, unless otherwise noted. CL < 5pF on all aux-DAC outputs. Typical values are at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Q-DAC DATA to CLK Rise Setup
Time
tDSQ
Figure 5 (Note 6)
9
ns
CLK Fall to I-DAC Data Hold Time
tDHI
Figure 5 (Note 6)
-4
ns
CLK Rise to Q-DAC Data Hold
Time
tDHQ
Figure 5 (Note 6)
-4
ns
CLK Duty Cycle
50
%
CLK Duty-Cycle Variation
±15
%
Digital Output Rise/Fall Time
20% to 80%
2.6
ns
SERIAL-INTERFACE TIMING CHARACTERISTICS (Figure 6, Note 6)
Falling Edge of
CS to Rising Edge
of First SCLK Time
tCSS
10
ns
DIN to SCLK Setup Time
tDS
10
ns
DIN to SCLK Hold Time
tDH
0ns
SCLK Pulse-Width High
tCH
25
ns
SCLK Pulse-Width Low
tCL
25
ns
SCLK Period
tCP
50
ns
SCLK to
CS Setup Time
tCS
10
ns
CS High Pulse Width
tCSW
80
ns
CS High to DOUT Active High
tCSD
Bit AD0 set
200
ns
CS High to DOUT Low (Aux-ADC
Conversion Time)
tCONV
Bit AD0 set, no averaging (see Table 14),
fCLK = 45MHz,
CLK divider = 16 (see Table 15)
4.27
s
DOUT Low to
CS Setup Time
tDCS
Bit AD0, AD10 set
200
ns
SCLK Low to DOUT Data Out
tCD
Bit AD0, AD10 set
14.5
ns
CS High to DOUT High Impedance
tCHZ
Bit AD0, AD10 set
200
ns
MODE-RECOVERY TIMING CHARACTERISTICS (Figure 7)
From shutdown to Rx mode, ADC settles
to within 1dB SINAD
85.2
Shutdown Wake-Up Time
tWAKE,SD
From shutdown to Tx mode, DAC settles to
within 10 LSB error
28.2
s
From idle to Rx mode with CLK present
during idle, ADC settles to within 1dB SINAD
9.8
Idle Wake-Up Time (With CLK)
tWAKE,ST0
From idle to Tx mode with CLK present
during idle, DAC settles to 10 LSB error
6.4
s
From standby to Rx mode, ADC settles to
within 1dB SINAD
13.7
Standby Wake-Up Time
tWAKE,ST1
From standby to Tx mode, DAC settles to
10 LSB error
24
s
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MAX19707EVCMOD2 功能描述:ADC / DAC多通道 Evaluation System for the MAX19707 RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換速率: 分辨率:8 bit 接口類型:SPI 電壓參考: 電源電壓-最大:3.6 V 電源電壓-最小:2 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-40
MAX19707EVCMODU 功能描述:ADC / DAC多通道 Evaluation System for the MAX19707 RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換速率: 分辨率:8 bit 接口類型:SPI 電壓參考: 電源電壓-最大:3.6 V 電源電壓-最小:2 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-40
MAX19707EVKIT 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 Evaluation Kit for the MAX19705 MAX19706 MAX19707 MAX19708 RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V
MAX19708ETM 功能描述:ADC / DAC多通道 RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換速率: 分辨率:8 bit 接口類型:SPI 電壓參考: 電源電壓-最大:3.6 V 電源電壓-最小:2 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-40
MAX19708ETM+ 功能描述:ADC / DAC多通道 11Msps CODEC/AFE 1.8/2.7-3.3V RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換速率: 分辨率:8 bit 接口類型:SPI 電壓參考: 電源電壓-最大:3.6 V 電源電壓-最小:2 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-40
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