參數(shù)資料
型號: MAX19713ETN+T
廠商: Maxim Integrated Products
文件頁數(shù): 22/37頁
文件大?。?/td> 0K
描述: IC ANLG FRNT END 56-TQFN
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 2,500
位數(shù): 10
通道數(shù): 2
功率(瓦特): 91.8mW
電壓 - 電源,模擬: 3V
電壓 - 電源,數(shù)字: 3V
封裝/外殼: 56-WFQFN 裸露焊盤
供應商設備封裝: 56-TQFN-EP(7x7)
包裝: 帶卷 (TR)
MAX19713
DIN can be written independent of DOUT state. A 16-bit
instruction at DIN updates the device configuration. To
prevent modifying internal registers while reading data
from DOUT, hold DIN at a high state (only applies if
sequential aux-ADC conversions are not executed).
This effectively writes all ones into address 1111. Since
address 1111 does not exist, no internal registers are
affected.
Reference Configurations
The MAX19713 features an internal precision 1.024V-
bandgap reference that is stable over the entire power-
supply and temperature ranges. The REFIN input
provides two modes of reference operation. The volt-
age at REFIN (VREFIN) sets the reference operation
mode (Table 18).
In internal reference mode, connect REFIN to VDD.
VREF is an internally generated 0.512V ±4% reference
level. COM, REFP, and REFN are low-impedance out-
puts with VCOM = VDD / 2, VREFP = VDD / 2 + VREF / 2,
and VREFN = VDD / 2 - VREF / 2. Bypass REFP, REFN,
and COM each with a 0.33F capacitor. Bypass REFIN
to GND with a 0.1F capacitor.
In buffered external reference mode, apply 1.024V
±10% at REFIN. In this mode, COM, REFP, and REFN
are low-impedance outputs with VCOM = VDD / 2,
VREFP = VDD / 2 + VREFIN / 4, and VREFN = VDD / 2 -
VREFIN / 4. Bypass REFP, REFN, and COM each with a
0.33F capacitor. Bypass REFIN to GND with a 0.1F
capacitor. In this mode, the Tx DAC full-scale output is
proportional to the external reference. For example, if
the VREFIN is increased by 10% (max), the Tx DAC full-
scale output is also increased by 10% or ±440mV.
Applications Information
Using Balun Transformer AC-Coupling
An RF transformer (Figure 9) provides an excellent
solution to convert a single-ended signal source to a
fully differential signal for optimum ADC performance.
Connecting the center tap of the transformer to COM
provides a VDD / 2 DC level shift to the input. A 1:1
transformer can be used, or a step-up transformer can
be selected to reduce the drive requirements. In gener-
al, the MAX19713 provides better SFDR and THD with
fully differential input signals than single-ended signals,
especially for high input frequencies. In differential
mode, even-order harmonics are lower as both inputs
(IAP, IAN, QAP, QAN) are balanced, and each of the
10-Bit, 45Msps, Full-Duplex
Analog Front-End
______________________________________________________________________________________
29
Figure 9. Balun Transformer-Coupled Single-Ended-to-
Differential Input Drive for Rx ADC
COM
IAP
IAN
25
Ω
0.1
μF
0.33
μF
25
Ω
0.1
μF
VIN
MAX19713
22pF
QAP
QAN
25
Ω
0.1
μF
0.33
μF
25
Ω
0.1
μF
VIN
22pF
Table 18. Reference Modes
VREFIN
REFERENCE MODE
> 0.8V x VDD
Internal Reference Mode. VREF is internally generated to be 0.512V. Bypass REFP, REFN, and COM each
with a 0.33F capacitor.
1.024V ±10%
Buffered External Reference Mode. An external 1.024V ±10% reference voltage is applied to REFIN. VREF is
internally generated to be VREFIN / 2. Bypass REFP, REFN, and COM each with a 0.33F capacitor. Bypass
REFIN to GND with a 0.1F capacitor.
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