參數(shù)資料
型號: MAX19713ETN+T
廠商: Maxim Integrated Products
文件頁數(shù): 28/37頁
文件大?。?/td> 0K
描述: IC ANLG FRNT END 56-TQFN
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 2,500
位數(shù): 10
通道數(shù): 2
功率(瓦特): 91.8mW
電壓 - 電源,模擬: 3V
電壓 - 電源,數(shù)字: 3V
封裝/外殼: 56-WFQFN 裸露焊盤
供應商設備封裝: 56-TQFN-EP(7x7)
包裝: 帶卷 (TR)
MAX19713
10-Bit, 45Msps, Full-Duplex
Analog Front-End
34
______________________________________________________________________________________
Effective Number of Bits (ENOB)
ENOB specifies the dynamic performance of an ADC at a
specific input frequency and sampling rate. An ideal
ADC’s error consists of quantization noise only. ENOB for
a full-scale sinusoidal input waveform is computed from:
ENOB = (SINAD - 1.76) / 6.02
Total Harmonic Distortion (THD)
THD is typically the ratio of the RMS sum of the first five
harmonics of the input signal to the fundamental itself.
This is expressed as:
where V1 is the fundamental amplitude and V2–V6 are
the amplitudes of the 2nd- through 6th-order harmonics.
Third Harmonic Distortion (HD3)
HD3 is defined as the ratio of the RMS value of the third
harmonic component to the fundamental input signal.
Spurious-Free Dynamic Range (SFDR)
SFDR is the ratio expressed in decibels of the RMS
amplitude of the fundamental (maximum signal compo-
nent) to the RMS value of the next-largest spurious com-
ponent, excluding DC offset.
Intermodulation Distortion (IMD)
IMD is the total power of the intermodulation product rel-
ative to the total input power when two tones, fIN1 and
fIN2, are present at the inputs. The intermodulation prod-
ucts are (fIN1 ±fIN2), (2 x fIN1), (2 x fIN2), (2 x fIN1 ±
fIN2), (2 x fIN2 ±fIN1). The individual input tone levels
are at -7dBFS.
3rd-Order Intermodulation (IM3)
IM3 is the power of the worst 3rd-order intermodulation
product relative to the input power of either input tone
when two tones, fIN1 and fIN2, are present at the inputs.
The 3rd-order intermodulation products are (2 x fIN1 ±
fIN2), (2 fIN2 ±fIN1). The individual input tone levels are
at -7dBFS.
Power-Supply Rejection
Power-supply rejection is defined as the shift in offset
and gain error when the power supply is changed ±5%.
Small-Signal Bandwidth
A small -20dBFS analog input signal is applied to an
ADC in such a way that the signal’s slew rate does not
limit the ADC’s performance. The input frequency is
then swept up to the point where the amplitude of the
digitized conversion result has decreased by 3dB. Note
that the T/H performance is usually the limiting factor
for the small-signal input bandwidth.
Full-Power Bandwidth
A large -0.5dBFS analog input signal is applied to an
ADC, and the input frequency is swept up to the point
where the amplitude of the digitized conversion result
has decreased by 3dB. This point is defined as the full-
power bandwidth frequency.
DAC Dynamic Parameter Definitions
Total Harmonic Distortion
THD is the ratio of the RMS sum of the output harmonics
up to the Nyquist frequency divided by the fundamental:
where V1 is the fundamental amplitude and V2 through
Vn are the amplitudes of the 2nd through nth harmonic
up to the Nyquist frequency.
Spurious-Free Dynamic Range
Spurious-free dynamic range (SFDR) is the ratio of RMS
amplitude of the fundamental (maximum signal compo-
nent) to the RMS value of the next-largest distortion
component up to the Nyquist frequency excluding DC.
THD
(V + V + ... + V )
V
2
3
2
n
2
1
=
20 x log
THD
(V +V +V +V +V )
V
2
3
2
4
2
5
2
6
2
1
=
20 x log
Selector Guide
PART
SAMPLING RATE (Msps)
INTEGRATED CDMA Tx FILTERS
MAX19710
7.5
No
MAX19711
11
Yes
MAX19712
22
No
MAX19713
45
No
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MAX19713EVKIT+ 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 MAX19710/13 Eval Kit RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V
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