參數(shù)資料
型號(hào): MAX3140EEI
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 微控制器/微處理器
英文描述: CABLE ASSEMBLY; LEAD-FREE SOLDER; SMA MALE TO SMC PLUG; 50 OHM, RG400/U COAX, DOUBLE SHIELDED
中文描述: 1 CHANNEL(S), 240K bps, SERIAL COMM CONTROLLER, PDSO28
封裝: 0.150 INCH, 0.025 INCH PITCH, QSOP-28
文件頁(yè)數(shù): 22/36頁(yè)
文件大?。?/td> 468K
代理商: MAX3140EEI
M
SPI/MICROWIRE-Compatible UART with Integrated
True Fail-Safe RS-485/RS-422 Transceivers
22
______________________________________________________________________________________
Baud-Rate Generator
The baud-rate generator determines the rate at which
the transmitter and receiver operate. Bits B3–B0 in the
WRITE CONFIGURATION register determine the baud-
rate divisor (BRD), which divides the X1 oscillator
frequency. The on-board oscillator operates with either
a 1.8432MHz or a 3.6864MHz crystal, or is driven at X1
with a 45% to 55% duty-cycle square wave. Table 6
shows baud-rate divisors for given input codes, as well
as the baud rate for 1.8432MHz and 3.6864MHz crys-
tals. The generator’s clock is 16 times the baud rate.
Interrupt Sources and Masks
Using the READ DATA or WRITE DATA register clears
the interrupt
IRQ
, assuming the conditions that initiated
the interrupt no longer exist. Table 7 gives the details
for each interrupt source. Figure 15 shows the function-
al diagram for the interrupt sources and mask blocks.
Two examples of setting up an IRQ for the MAX3140
are shown below.
Example 1: Setting up only the transmit buffer-empty
interrupt.
Send the 16-bit word below into DIN of the MAX3140
using the WRITE CONFIGURATION register. This 16-bit
word configures the MAX3140 for 9600bps, 8-bit words,
no parity, and one stop bit with a 1.8432MHz crystal.
binary 1100100000001010
HEX
C80A
Notes:
bit 15, 14: DIN
0, 0 = Read Data
bit 13–0: DIN
Zeros
bit 15: DOUT
R = 1, Data is available to be read from the receive register or
FIFO.
R = 0, Receive register and FIFO are empty.
bit 14: DOUT
T = 1, Transmit buffer is empty.
T = 0, Transmit buffer is full.
bit 13–11: DOUT
Zeros
bit 10: DOUT
RA/FE = Receive-activity (UART shutdown)/Framing-error
(normal operation) bit
bit 9: DOUT
CTS =
CTS
input state. If CTS = 0, then
CTS
= 1 and vice versa.
bit 8: DOUT
Pr = Received parity bit. This is only valid if PE = 1.
bit 7–0: DOUT
D7t–D0t = Received Data bits. D7r = 0 for L = 1.
Table 5. READ DATA Register Bit Assignment (D15, D14 = 0, 0)
14
0
T
6
0
D6r
7
0
D7r
15
2
DIN
0
0
DOUT
R
D2r
BIT
3
0
D3r
0
0
D0r
1
0
D1r
4
0
D4r
5
0
D5r
10
0
RA/FE
11
0
0
8
0
Pr
9
0
CTS
12
0
0
13
0
0
Table 6. Baud-Rate Selection Table*
115.2k
57.6k
230.4k**
BAUD
RATE
(f
OSC
=
3.6864MHz)
BAUD
B2 B1 B0
B3
2
4
0
0
0
0
0
1
1
0
1
0
0
0
0**
DIVISION
RATIO
57.6k
28.8k
115.2k**
BAUD
RATE
(f
OSC
=
1.8432MHz)
28.8k
14.4k
8
0
0
0
1
1
0
1
0
14.4k
7200
7200
3600
1800
76.8k
128
3
0
1
1
0
1
0
1
0
64
0
1
1
0
900
38.4k
1800
32
0
1
0
1
16
3600
38.4k
19.2k
9600
4800
24
48
1
1
0
1
1
0
1
0
12
1
0
1
0
4800
2400
9600
2400
1200
600
384
1
1
1
1
192
1
1
1
0
300
600
96
1
1
0
1
1200
6
1
0
0
1
19.2k
*Standard baud rates shown in bold
**Default baud rate
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