M
V
BUS
Level-Detection Comparators
Comparators drive status register bits 0, 1, and 2 to
indicate these important USB OTG V
BUS
voltage levels:
V
BUS
is valid (V
BUS
> 4.6V)
A USB session is valid (V
BUS
> 1.4V)
A USB session is ended (V
BUS
< 0.5V)
The 4.6V comparator sets bit 0 in status register
V
BUS_VALID
to 1 if V
BUS
> 4.6V. The A Device uses the
V
BUS
valid status bit (V
BUS_VALID
) to determine if the B
Device is sinking too much current (i.e., is not supported).
The interrupt can be associated to either a positive or a
negative transition. The 1.4V comparator sets bit 1 of sta-
tus register SESSION_VALID to 1 if V
BUS
> 1.4V. This sta-
tus bit indicates that a data transfer session is valid and
the interrupt can be associated to either a positive or a
negative transition. The session-end comparator sets bit
2 in the status register SESSION_END to a 1 when V
BUS
< 0.5V, and generates an interrupt when V
BUS
falls below
0.5V. Figure 1 shows the level-detector comparators.
Interrupt Logic
When OTG events require action, the MAX3353E pro-
vides an interrupt output signal on
INT
. An interrupt is
triggered (
INT
goes low) when one of the conditions
specified by the interrupt-mask register and interrupt-
edge register is verified.
INT
stays active until the inter-
rupt is cleared by reading the interrupt latch register.
Shutdown
In shutdown mode, the MAX3353E
’
s quiescent current
is reduced to less than 2μA. Bit 0 in control register 2
controls the shutdown feature. Setting bit 0 = 1 places
the device in shutdown mode (Figure 2, Table 5). When
in shutdown, the MAX3353E
’
s charge-pump current
generator and V
BUS
detection comparators are turned
off. During shutdown, the I
2
C serial interface is fully
functional and registers can be read from or written to.
ID_IN and ID_OUT are both functional in shutdown.
V
BUS
Power Control
V
BUS
is a dual-function I/O that can supply USB OTG-
compliant voltage to the USB. The V
BUS
power-control
block performs the various switching functions required
by an OTG dual-role device. This action is programmed
by the system logic using internal register control bits in
control register 2.
Discharge V
BUS
through a resistor to ensure a ses-
sion is not in progress.
Charge V
BUS
through an internal current generator
to initiate SRP (session request protocol).
Connect the charge pump to V
BUS
to provide power
on V
BUS
.
Bit 0 (SDWN) in control register 2 is used to place the
MAX3353E in normal operation or shutdown mode.
Setting bit 1 (V
BUS_CHG1
) issues a timed pulse on V
BUS
suitable for implementing the session request protocol
(see the
SRP V
BUS
Pulsing
section). The pulse is created
by turning a current source
–
supplied by V
CC
and con-
nected to V
BUS
–
on and off. Setting control register bit
2 (V
BUS_CHG2
) to 1 charges VBUS through the current
source continuously. Setting V
BUS_CHG2
to zero discon-
nects the current source. Bit 3 (V
BUS_DRV
) turns the
USB On-the-Go Charge Pump with Switchable
Pullup/Pulldown Resistors
8
_______________________________________________________________________________________
V
BUS
4.6V
V
BUS_VALID
1.4V
SESSION_VALID
0.5V
SESSION_END
Figure 1. Comparator Network Diagram
CHARGE
PUMP
ON/OFF
V
BUS
V
CC
CURRENT SOURCE
67k
5k
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
1
CONTROL REGISTER 2
0 = OPERATING MODE
1 = SHUTDOWN MODE
DEFAULT
(POWER-ON)
VALUES
NOTE:
SWITCHES ARE SHOWN IN THEIR DEFAULT
(POWER-ON) POSITIONS. A "1" CLOSES A SWITCH.
CURRENT
GATE
TIMER
Figure 2. Power-Control Block Diagram