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參數(shù)資料
| 型號： | MAX3861ETG+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 8/13頁 |
| 文件大小： | 0K |
| 描述： | IC AMP POST W/AGC 24-TQFN-EP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 75 |
| 類型： | 后置放大器 |
| 應(yīng)用： | 光纖學(xué)網(wǎng)絡(luò) |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 24-TQFN-EP（4x4） |
| 包裝： | 管件 |
MAX3861
2.7Gbps Post Amp with Automatic Gain Control
4
_______________________________________________________________________________________
Typical Operating Characteristics
(VCC = +3.3V, TA = +25°C, unless otherwise noted.)
100
300
200
600
500
400
900
800
700
1000
0
400
200
600
800
1000
1200
OUTPUT AMPLITUDE
vs. INPUT AMPLITUDE
MAX3861
toc01
INPUT AMPLITUDE (mVP-P)
OUTPUT
AMPLITUDE
(mV
P-P
)
VSC = 2.0V
VSC = GND
223 - 1PRBS AT 2.7Gbps
DISTRIBUTION OF SD HYSTERESIS
(WORST-CASE CONDITIONS)
MAX3861
toc02
SD HYSTERESIS (dB)
PERCENT
OF
UNITS
(%)
7.0
6.5
6.0
5.5
5.0
4.5
4.0
3.5
5
10
15
20
25
0
3.0
7.5
VCC = 3.0V
VSC = 2.0V
VIN = 2mVP-P
TA = -40°C
MEAN = 4.52dB
σ = 0.79dB
DETERMINISTIC JITTER
vs. INPUT AMPLITUDE
MAX3861
toc03
INPUT AMPLITUDE (mVP-P)
DETERMINISTIC
JITTER
(ps
P-P
)
1000
100
10
2
4
6
8
10
12
14
16
18
20
0
1
10,000
50
65
60
55
70
75
80
85
90
95
100
-40
-10
20
50
80
SUPPLY CURRENT vs. TEMPERATURE
MAX3861
toc04
TEMPERATURE (°C)
SUPPLY
CURRENT
(mA)
EN = VCC
EN = GND
EXCLUDES OUTPUT
LOAD CURRENTS
VIN = 1200mVP-P
VSC = 0
76ps/div
EYE DIAGRAM, MINIMUM INPUT
MAX3861
toc05
VIN = 6mVP-P
223 - 1PRBS
76ps/div
MAX3861
toc06
VIN = 1200mVP-P
223 - 1PRBS
EYE DIAGRAM, MAXIMUM INPUT
Note 5:
See the Distribution of Differential Output Offset (Worst-Case Conditions) graph in the Typical Operating Characteristics.
Note 6:
Characterized with a 675Mbps 1-0 pattern.
Note 7:
Measurements are taken over an input signal range of 16dB.
Note 8:
Deterministic jitter is defined as the arithmetic sum of PWD (pulse-width distortion) and PDJ (pattern-dependent jitter).
Deterministic jitter is the difference between total jitter and random jitter, with system jitter calibrated out. It is measured
with a 27 - 1PRBS, and 80CIDs with DC-coupled outputs.
Note 9:
The typical input resistance of the SC pin is 40k.
Note 10: AGC loop time constant is measured with a 20dB change in the input and VSC held constant. With an external capacitor
CCG of 0.022F connected between CG+ and CG-, a typical AGC loop time constant of 760s is achieved.
Note 11: SD deassert time depends on the AGC loop time constant set by CCG.
Note 12: SD accuracy is defined as the part-to-part variation of the SD threshold at a fixed RTH value.
Note 13: See the Distribution of SD Hysteresis (Worst-Case Conditions) graph in the Typical Operating Characteristics.
Note 14: Measurements are taken over an input signal range of 20dB.
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +3.0V to +3.6V, TA = -40°C to +85°C. Typical values are at VCC = +3.3V and TA = +25°C, unless otherwise noted.) (Note 1)
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