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參數(shù)資料
| 型號： | MAX3876 |
| 廠商： | Maxim Integrated Products, Inc. |
| 英文描述： | 16-Channel LVDM Transceiver 64-TSSOP -40 to 85 |
| 中文描述： | 2.5Gbps、低功耗、+3.3V時鐘恢復(fù)及數(shù)據(jù)再定時IC |
| 文件頁數(shù)： | 7/12頁 |
| 文件大?。?/td> | 744K |
| 代理商： | MAX3876 |
Input and Output Terminations
The MAX3876’s digital outputs (SDO+, SDO-, SCLKO+,
SCLKO-) are internally terminated with 50
to V
CC
(Figure 6). See the
DC Electrical Characteristics
for sig-
nal swing and common-mode voltage levels. To ensure
best performance, the differential outputs must have
balanced loads. The input termination can be driven
differentially or can be driven single-ended by external-
ly biasing SDI- or SLBI- to the center of the voltage
swing.
Jitter Tolerance and Input
Sensitivity Trade-Offs
When the received data amplitude is higher than
50mVp-p, the MAX3876 provides a typical jitter toler-
ance of 0.51UI at jitter frequencies greater than 10MHz.
The SDH/SONET jitter tolerance specification is 0.15UI,
leaving a jitter allowance of 0.36UI for receiver pream-
plifier and postamplifier design.
The BER is better than 1
·
10
-10
for input signals greater
than 10mVp-p. At this input level, jitter tolerance will be
degraded but will still be above the SDH/SONET
requirement. The user can make a trade-off between jit-
ter tolerance and input sensitivity according to the
specific application. See the
Typical Operating
Characteristics
for Jitter Tolerance and BER vs. Input
Amplitude graphs.
Jitter Tolerance vs.
Pulse-Width Distortion
The MAX3876 can typically tolerate up to 0.20UI of
pulse-width distortion (PWD) and still exceed ITU and
Bellcore specifications for sinusoidal jitter tolerance.
Refer to the
Typical Operating Characteristics
for Jitter
Tolerance and PWD vs. Jitter Frequency graphs.
Applications Information
Consecutive Identical Digits (CIDs)
The MAX3876 has a low phase and frequency drift in
the absence of data transitions. As a result, long runs of
consecutive zeros and ones can be tolerated while
maintaining a BER of 1
·
10
-10
. The CID tolerance is
tested using a 2
13
- 1 PRBS, substituting a long run of
zeros to simulate the worst case. A CID tolerance of
2500 bits is typical.
System Loopback
The MAX3876 is designed to allow system loopback
testing. The user can connect a serializer output in a
transceiver directly to the SLBI+ and SLBI- inputs of the
MAX3876 for system diagnostics. To select the SLBI±
inputs, apply a TTL logic high to the SIS pin.
PECL Input Levels
When interfacing with differential PECL input levels, it is
important to attenuate the signal while still maintaining
50
termination (Figure 7). AC-coupling is also
required to maintain the input common-mode level.
Layout
The MAX3876’s performance can be significantly
affected by circuit board layout and design. Use good
high-frequency design techniques, including minimiz-
ing ground inductance and using fixed-impedance
transmission lines on the data and clock signals.
Power-supply decoupling should be placed as close to
V
CC
as possible. Take care to isolate the input from the
output signals to reduce feedthrough.
M
2.5Gbps, Low-Power, +3.3V
Clock Recovery and Data Retiming IC
_______________________________________________________________________________________
7
MAX3876
V
CC
50
SDO+
SDO-
50
Figure 6. CML Outputs
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PDF描述 |
|---|---|
| MAX3877EHJ | 2.5Gbps, +3.3V Clock and Data Retiming ICs with Vertical Threshold Adjust |
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| MAX3878EHJ | 2.5Gbps, +3.3V Clock and Data Retiming ICs with Vertical Threshold Adjust |
| MAX3890 | Full-Duplex LVDM Transceiver 8-MSOP -40 to 85 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX3876E/D | 功能描述:計時器和支持產(chǎn)品 RoHS:否 制造商:Micrel 類型:Standard 封裝 / 箱體:SOT-23 內(nèi)部定時器數(shù)量:1 電源電壓-最大:18 V 電源電壓-最小:2.7 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Reel |
| MAX3876EHJ | 功能描述:計時器和支持產(chǎn)品 Integrated Circuits (ICs) RoHS:否 制造商:Micrel 類型:Standard 封裝 / 箱體:SOT-23 內(nèi)部定時器數(shù)量:1 電源電壓-最大:18 V 電源電壓-最小:2.7 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Reel |
| MAX3876EHJ+ | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 Integrated Circuits (ICs) RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| MAX3876EHJ+T | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 Integrated Circuits (ICs) RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| MAX3876EHJ-T | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
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