參數(shù)資料
型號: MAX4589EWP
廠商: Maxim Integrated Products
文件頁數(shù): 6/20頁
文件大小: 0K
描述: IC MUX DUAL RF VIDEO 2CH 20-SOIC
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 36
功能: 視頻多路復(fù)用器
電路: 2 x 2:1
導(dǎo)通狀態(tài)電阻: 60 歐姆
電壓電源: 單/雙電源
電壓 - 電源,單路/雙路(±): 2.7 V ~ 12 V,± 2.7 V ~ 6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 20-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 20-SOIC W
包裝: 管件
MAX4589
Low-Voltage, High-Isolation,
Dual 2-Channel RF/Video Multiplexer
14
______________________________________________________________________________________
N1
P1
N2
N3
P2
A2
A1
COM_
NO_
CONTROL
LOGIC
V+
A_
VL
GND
V-
Figure 8. T-Switch Construction
__________Applications Information
Power-Supply Considerations
Overview
The MAX4589 construction is typical of many CMOS
analog switches. It has four supply pins: V+, V-, VL, and
GND. V+ and V- are used to drive the internal CMOS
switches and set the limits of the analog voltage on any
switch. Reverse ESD-protection diodes are internally
connected between each analog signal pin and both
V+ and V-. If the voltage on any pin exceeds V+ or V-,
one of these diodes conducts. During normal operation
these reverse-biased ESD diodes leak, forming the only
current drawn from V- and V+.
Virtually all the analog leakage current is through the
ESD diodes. Although the ESD diodes on a given sig-
nal pin are identical, and therefore fairly well balanced,
they are reverse-biased differently. Each is biased by
either V+ or V- and the analog signal. This means their
leakages vary as the signal varies. The difference in the
two diode leakages from the signal path to the V+ and
V- pins constitutes the analog signal-path leakage cur-
rent. All analog leakage current flows to the supply ter-
minals, not to the other switch terminal. This explains
how both sides of a given switch can show leakage
currents of either the same or opposite polarity.
There is no connection between the analog signal
paths and GND. The analog signal paths consist of an
N-channel and P-channel MOSFET with their sources
and drains paralleled and their gates driven out of
phase to V+ and V- by the logic-level translators.
VL and GND power the internal logic and logic-level
translators, and set the input logic thresholds. The
logic-level translators convert the logic levels to
switched V+ and V- signals to drive the gates of the
analog switches. Therefore, the gate-to-source and
gate-to-drain impedances are the only connection
between the logic supplies and the analog supplies.
Bipolar-Supply Operation
The MAX4589 operates with bipolar supplies between
±2.7V and ±6V. The V+ and V- supplies are not
required to be symmetrical, but their sum cannot
exceed the absolute maximum rating of 13.0V. Do not
connect the MAX4589 V+ pin to +3V and connect the
logic-level input pins to TTL logic-level signals. This
exceeds the absolute maximum ratings, and may
cause damage to the part and/or external circuits.
CAUTION: The absolute maximum V+ to V- differen-
tial voltage is 13.0V. Typical “±6-Volt” or “12-Volt”
supplies with ±10% tolerances can be as high as
13.2V. This voltage can damage the MAX4589. Even
±5% tolerance supplies may have overshoot or
noise spikes that exceed 13.0V.
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