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參數(shù)資料
| 型號(hào)： | MAX4685EBC+T |
| 廠商： | Maxim Integrated Products |
| 文件頁(yè)數(shù)： | 8/10頁(yè) |
| 文件大小： | 0K |
| 描述： | IC SWITCH DUAL SPDT 12UCSP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 功能： | 開(kāi)關(guān) |
| 電路： | 2 x SPDT |
| 導(dǎo)通狀態(tài)電阻： | 800 毫歐 |
| 電壓電源： | 單電源 |
| 電壓 - 電源，單路/雙路(±)： | 1.8 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 12-WFBGA，WLCSP |
| 供應(yīng)商設(shè)備封裝： | 12-UCSP（3x4） |
| 包裝： | 帶卷 (TR) |
UCSP Package Consideration
For general UCSP package information and PC layout
considerations, please refer to the Maxim Application
Note (Wafer-Level Ultra-Chip-Board-Scale Package).
UCSP Reliability
The chip-scale package (UCSP) represents a unique
packaging form factor that may not perform equally to a
packaged product through traditional mechanical relia-
bility tests. UCSP reliability is integrally linked to the
user’s assembly methods, circuit board material, and
usage environment. The user should closely review
these areas when considering use of a UCSP package.
Performance through Operating Life Test and Moisture
Resistance remains uncompromised as it is primarily
determined by the wafer-fabrication process.
Mechanical stress performance is a greater considera-
tion for a UCSP package. UCSPs are attached through
direct solder contact to the user’s PC board, foregoing
the inherent stress relief of a packaged product lead
frame. Solder joint contact integrity must be consid-
ered. Information on Maxim’s qualification plan, test
data, and recommendations are detailed in the UCSP
application note, which can be found on Maxim’s web-
site at www.maxim-ic.com.
Chip Information
PROCESS: BiCMOS
MAX4684/MAX4685
0.5
Ω
Ω/0.8Ω
Ω Low-Voltage, Dual SPDT
Analog Switches in UCSP
_______________________________________________________________________________________
7
tr < 5ns
tf < 5ns
50%
VIL
LOGIC
INPUT
RL
50
Ω
COM_
GND
IN_
CL INCLUDES FIXTURE AND STRAY CAPACITANCE.
VOUT = VN_
(
RL
)
RL + RON
VIN_
VIH
tOFF
0
NO_
OR NC
0.9 x V0UT
0.9 x VOUT
tON
VOUT
SWITCH
OUTPUT
LOGIC
INPUT
LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES
THAT HAVE THE OPPOSITE LOGIC SENSE.
V+
CL
35pF
V+
VOUT
MAX4684
MAX4685
Figure 2. Switching Time
Test Circuits/Timing Diagrams
50%
VIH
VIL
LOGIC
INPUT
VOUT
0.9 x VOUT
tD
LOGIC
INPUT
RL
50
Ω
GND
CL INCLUDES FIXTURE AND STRAY CAPACITANCE.
NO_
IN_
NC_
VOUT
V+
CL
35pF
VN_
COM_
MAX4684
MAX4685
Figure 3. Break-Before-Make Interval
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX4685ETB | 制造商:Rochester Electronics LLC 功能描述: 制造商:Maxim Integrated Products 功能描述: |
| MAX4685ETB-T | 制造商:Rochester Electronics LLC 功能描述: 制造商:Maxim Integrated Products 功能描述: |
| MAX4685EUB | 功能描述:模擬開(kāi)關(guān) IC RoHS:否 制造商:Texas Instruments 開(kāi)關(guān)數(shù)量:2 開(kāi)關(guān)配置:SPDT 開(kāi)啟電阻（最大值）:0.1 Ohms 切換電壓（最大）: 開(kāi)啟時(shí)間（最大值）: 關(guān)閉時(shí)間（最大值）: 工作電源電壓:2.7 V to 4.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-16 |
| MAX4685EUB+ | 功能描述:模擬開(kāi)關(guān) IC .5/.8Ohm Dual SPDT Analog Switch RoHS:否 制造商:Texas Instruments 開(kāi)關(guān)數(shù)量:2 開(kāi)關(guān)配置:SPDT 開(kāi)啟電阻（最大值）:0.1 Ohms 切換電壓（最大）: 開(kāi)啟時(shí)間（最大值）: 關(guān)閉時(shí)間（最大值）: 工作電源電壓:2.7 V to 4.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-16 |
| MAX4685EUB+T | 功能描述:模擬開(kāi)關(guān) IC .5/.8Ohm Dual SPDT Analog Switch RoHS:否 制造商:Texas Instruments 開(kāi)關(guān)數(shù)量:2 開(kāi)關(guān)配置:SPDT 開(kāi)啟電阻（最大值）:0.1 Ohms 切換電壓（最大）: 開(kāi)啟時(shí)間（最大值）: 關(guān)閉時(shí)間（最大值）: 工作電源電壓:2.7 V to 4.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-16 |
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