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參數(shù)資料
| 型號： | MAX4732EUA+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 14/14頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SWITCH DUAL SPST 8UMAX |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 功能： | 開關(guān) |
| 電路： | 2 x SPST - NC |
| 導(dǎo)通狀態(tài)電阻： | 50 歐姆 |
| 電壓電源： | 單電源 |
| 電壓 - 電源，單路/雙路(±)： | 2 V ~ 11 V |
| 電流 - 電源： | 1µA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-TSSOP，8-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-uMAX |
| 包裝： | 帶卷 (TR) |
MAX4731/MAX4732/MAX4733
50
, Dual SPST Analog Switches in UCSP
_______________________________________________________________________________________
9
Test Circuits/Timing Diagrams (continued)
50%
VIL
LOGIC
INPUT
RL
300
IN_
CL INCLUDES FIXTURE AND STRAY CAPACITANCE.
(
RL
)
VN_
VIH
tOFF
0V
NO_
OR NC_
0.9 x VOUT
tON
VOUT
SWITCH
OUTPUT
LOGIC
INPUT
LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES
THAT HAVE THE OPPOSITE LOGIC SENSE.
V+
COM_
CL
35pF
V+
VOUT
MAX4731
MAX4732
MAX4733
GND
RL + RON
tr < 5ns
tf < 5ns
VOUT = VN_
Figure 2. Switching Time
50%
0.9 x V0UT1
V+
0V
LOGIC
INPUT
SWITCH
OUTPUT 2
(VOUT2)
0V
0.9 x VOUT2
tBBM
LOGIC
INPUT
RL2
300
GND
CL INCLUDES FIXTURE AND STRAY CAPACITANCE.
NC2
IN2
IN1
NO1
VOUT2
V+
CL2
35pF
VN_
RL1
300
VOUT1
CL1
35pF
COM1
COM2
SWITCH
OUTPUT 1
(VOUT1)
MAX4733
tr < 5ns
tf < 5ns
Figure 3. Break-Before-Make Interval (MAX4733 only)
VGEN
GND
COM
CL
1nF
VOUT
V+
VOUT
IN
OFF
ON
OFF
VOUT
Q = (
VOUT)(CL)
NC_
OR NO_
IN DEPENDS ON SWITCH CONFIGURATION;
INPUT POLARITY DETERMINED BY SENSE OF SWITCH.
OFF
ON
OFF
IN
VIL TO VIH
V+
RGEN
IN_
MAX4731
MAX4732
MAX4733
Figure 4. Charge Injection
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