參數(shù)資料
型號(hào)： MAX5109EEE+T
廠商： Maxim Integrated Products
文件頁(yè)數(shù)： 6/17頁(yè)
文件大?。?/td> 0K
描述： IC DAC 8BIT DUAL NV 16-QSOP
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 2,500
設(shè)置時(shí)間： 6µs
位數(shù)： 8
數(shù)據(jù)接口： 串行
轉(zhuǎn)換器數(shù)目： 2
電壓電源： 單電源
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 16-SSOP（0.154"，3.90mm 寬）
供應(yīng)商設(shè)備封裝： 16-QSOP
包裝： 帶卷 (TR)
輸出數(shù)目和類型： 2 電壓，單極
采樣率（每秒）： *
MAX5109
Mute/Power-Down Register and Operation
Separate nonvolatile and volatile control registers store
and update the state of the mute/power-down mode for
each DAC. Tables 7 and 8 show how to access and
control each register. Register access is gained by set-
ting control bits C3–C0 to 0100. Bits C5 and C4 indi-
cate whether the nonvolatile or volatile control register
is accessed. The volatile register maintains data while
the device remains powered. The nonvolatile register
maintains data even after power is removed. The
MAX5109 starts up (power first applied) by transferring
the mute/power-down modes from the nonvolatile con-
trol register to the volatile control register. The non-
volatile control register is set to 00 hex at the factory.
Power-On Reset
Power-on reset (POR) circuitry controls the initialization
of the MAX5109. A POR loads the volatile registers with
the data stored in the nonvolatile registers.
This initialization period takes 500s (typ). During this
time, the DAC outputs are held in mute mode. At the
completion of the initialization period, the DAC outputs
update in accordance with the data stored in the non-
volatile registers.
Nonvolatile, Dual, 8-Bit DACs with 2-Wire Serial
Interface
14
______________________________________________________________________________________
NONVOLATILE
(NV)
VOLATILE
(V)
FUNCTION
0
1
Read from VREG_
1
0
Read from NVREG_
Table 5. Volatile and Nonvolatile Read
Selection
R3
R2
R1
R0
FUNCTION
0
DAC0
0
1
DAC1
Table 6. DAC Read Selection
DATA BYTE
ADDRESS
BYTE
COMMAND BYTE
MSB
LSB
COMMAND
S
T
A
R
T
R/
W
A
C
K
C
7
C
6
C
5
C
4
C
3
C
2
C
1
C
0
A
C
K
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
A
C
K
STOP
Write VCTL
S
0
000
10
1
0
Control register*
P
Write NVCTL
S
0
001
00
1
0
Control register*
P
Write VCTL
and NVCTL
S
0
001
10
1
0
Control register*
P
Transfer
NVCTL to
VCTL
S
0
000
00
1
0
Control register*
P
Table 7. Mute/Power-Down Operation
*See Mute/Power-Down Control Register (Table 8).
X = Don’t care.
BIT IN REGISTER
D7
(MSB)
D6
D5
D4
D3
D2
D1
D0
(LSB)
CONTROLLING
FUNCTION
XX
Mute DAC1
Mute DAC0
XX
Power-down
DAC1
Power-down
DAC0
Table 8. Mute/Power-Down Control Register
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