參數(shù)資料
型號: MAX5316GTG+T
廠商: Maxim Integrated Products
文件頁數(shù): 17/33頁
文件大小: 0K
描述: IC DAC 16BIT SPI 24TQFN
產(chǎn)品培訓(xùn)模塊: Obsolescence Mitigation Program
標準包裝: 2,500
設(shè)置時間: 3µs
位數(shù): 16
數(shù)據(jù)接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 模擬和數(shù)字,雙 ±
功率耗散(最大): 2.29W
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 24-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 24-TQFN-EP(4x5)
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 1 電壓,單極;1 電壓,雙極
24
MAX5316
16-Bit, ±1 LSB Accuracy Voltage Output
DAC with SPI Interface
Daisy-Chain SPI Operation Using READY Output
The READY pulse appears 24 clock cycles after the neg-
ative edge of CS as shown in Figure 5 and can therefore
be used as the CS line for the next device in the daisy
chain. Since the device looks at the first 24 bits of the
transmission following the falling edge of CS, it is pos-
sible to daisy-chain the device with different command
word lengths. READY goes high after CS is driven high.
To perform a daisy-chain write operation, drive CS low
and output the data serially to DIN. The propagation of
the READY signal then controls how the data is read by
the device. As the data propagates through the daisy
chain, each individual command in the chain is executed
on the 24th falling clock edge following the falling edge
of the respective CS input. To update just one device
in a daisy chain, send the no-op command to the other
device in the chain. To update the first device in the
chain, raise the CS input after writing to that device.
Because daisy-chain operation requires paralleling the
DOUTs of all the MAX5316 in the chain, the NO_HOLDEN
bit in register 0x4 or 0xC should be set to 1 for all devices.
Doing so ensures that DOUT goes into high-impedance
after the SPI frame is complete (i.e. after the 24th clock
cycle) as shown in Figure 6.
Note that ‘X’ is don’t care.
Table 5. SPI Command and Data Mapping with Clock Falling Edges
Figure 5. Daisy-Chain SPI Connection Terminating with a Standard SPI Device
C
SLAVE 1
SCLK
DIN
DOUT
MOSI
MISO
I/O
SCK
SLAVE 3
SCLK
DIN
POUT
SLAVE 2
SCLK
DIN
DOUT
CS
READY
CS
READY
CS
READY
CLOCK
EDGE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
DIN
R3 R2 R1 R0 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
X
DOUT
0 R3 R2 R1 R0 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
X
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