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參數(shù)資料
| 型號(hào)： | MAX5322EAI+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 6/18頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 12BIT DUAL 10V SER 28SSOP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 46 |
| 設(shè)置時(shí)間： | 10µs |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 電壓電源： | 模擬和數(shù)字，雙 ± |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-SSOP（0.209"，5.30mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 28-SSOP |
| 包裝： | 管件 |
| 輸出數(shù)目和類型： | 2 電壓，單極；2 電壓，雙極 |
| 采樣率（每秒）： | * |
| 產(chǎn)品目錄頁面： | 1397 (CN2011-ZH PDF) |
MAX5322
and isolate the shift register from the DAC registers.
The DAC registers control the DAC ladder and thus the
output voltage. Any update to a DAC register updates
the respective output voltage.
Data in the shift register is transferred to the input regis-
ters during the appropriate software command only.
Data in the input registers is transferred to the DAC
registers in two ways: using the software command, or
through external logic control using the asynchronous
load input (LDAC). Table 2 shows the software com-
mands that transfer the data from the shift register to
the input and/or DAC registers. The CLR, an external
logic control, asynchronously forces all outputs to 0V, in
both unipolar and bipolar modes. Interface timing is
shown in Figures 2 and 3.
Wait a minimum of 100ns after CS goes high before
implementing LDAC or CLR. If either of these logic
inputs activates during a data transfer, the incoming
data is corrupted and needs to be reloaded. For soft-
ware control only, tie LDAC and CLR high.
DAC Architecture
The MAX5322 uses an inverted DAC ladder architec-
ture to convert the digital input into an analog output
voltage. The digital input controls weighted switches
that connect the DAC-ladder nodes to either REFA
(REFB) or GND (Figure 4). The sum of the weights pro-
duces the analog equivalent of the digital-input word
and is then buffered at the output.
External Reference and Transfer
Functions
Connect an external reference of 2V to 5.25V to REFA
and REFB. Set the output voltage range with the refer-
ence and the input code by using the equations below.
Unipolar output voltage:
V
LSB
CODE
OUT UNI
UNI
_
=×
±10V, Dual, 12-Bit, Serial, Voltage-Output DAC
14
______________________________________________________________________________________
SCLK
DIN
COMMAND EXECUTED
9
8
16
(1)
1
C2
C3
D0
C1
C0
D11
D10
D9
D6
D5
D4
D3
D2
D1
D8
D7
CS
Figure 2. Serial-Interface Signals
SCLK
DIN
DOUT
tCS0
tCSS
tCP
tCSH
tCS1
tCSW
tCSD
tLDS
tLD
tCH
tDS
tCSE
tDO1
tDH
tCL
MSB
LSB
CS
LDAC
Figure 3. Serial-Interface Timing Diagram
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參數(shù)描述 |
|---|---|
| MAX5322EAI+ | 功能描述:數(shù)模轉(zhuǎn)換器- DAC 12-Bit 2Ch Precision DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| MAX5322EAI+T | 功能描述:數(shù)模轉(zhuǎn)換器- DAC 12-Bit 2Ch Precision DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| MAX5322EAI-T | 功能描述:數(shù)模轉(zhuǎn)換器- DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| MAX532ACPE | 功能描述:數(shù)模轉(zhuǎn)換器- DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| MAX532ACPE+ | 功能描述:數(shù)模轉(zhuǎn)換器- DAC 12-Bit 2Ch Precision DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
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