參數(shù)資料
型號: MAX5484EUD+T
廠商: Maxim Integrated Products
文件頁數(shù): 9/20頁
文件大小: 0K
描述: IC POT DGTL 10BIT NV 14-TSSOP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
接片: 1024
電阻(歐姆): 50k
電路數(shù): 1
溫度系數(shù): 標(biāo)準(zhǔn)值 35 ppm/°C
存儲器類型: 非易失
接口: 4 線串行(芯片選擇,遞增,增/減)
電源電壓: 2.7 V ~ 5.25 V,±2.5 V ~ 5.25 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 14-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 14-TSSOP
包裝: 帶卷 (TR)
10-Bit, Nonvolatile, Linear-Taper Digital
Potentiometers
Standby Mode
The MAX5481–MAX5484 feature a low-power standby
mode. When the device is not being programmed, it
enters into standby mode and supply current drops to
0.5A (typ).
Nonvolatile Memory
The internal EEPROM consists of a nonvolatile register
that retains the last value stored prior to power-down.
The nonvolatile register is programmed to midscale at
the factory. The nonvolatile memory is guaranteed for
50 years of wiper data retention and up to 200,000
wiper write cycles.
Power-Up
Upon power-up, the MAX5481–MAX5484 load the data
stored in the nonvolatile wiper register into the volatile
wiper register, updating the wiper position with the data
stored in the nonvolatile wiper register.
Applications Information
The MAX5481–MAX5484 are ideal for circuits requiring
digitally controlled adjustable resistance, such as LCD
contrast control (where voltage biasing adjusts the dis-
play contrast), or programmable filters with adjustable
gain and/or cutoff frequency.
Positive LCD Bias Control
Figures 9 and 10 show an application where a voltage-
divider or a variable resistor is used to make an
adjustable, positive LCD-bias voltage. The op amp pro-
vides buffering and gain to the voltage-divider network
made by the programmable voltage-divider (Figure 9) or
to a fixed resistor and a variable resistor (see Figure 10).
Programmable Gain and Offset Adjustment
Figure 11 shows an application where a voltage-divider
and a variable resistor are used to make a programma-
ble gain and offset adjustment.
CS
SCLK(INC)
DIN(U/D)
VW
tS
tID
tDI
tIH
tIL
tCYC
tCI
tIC
tCPH
tWSC
tIK
WIPER POSITION
NOT STORED
WIPER POSITION
STORED
NOTES:
VW IS NOT A DIGITAL SIGNAL. IT REPRESENTS A WIPER TRANSITION.
SCLK(INC) MUST BE AT LOGIC HIGH WHEN DIN(U/D) CHANGES STATE.
Figure 8. Up/Down Serial-Interface Timing Diagram (SPI/
UD = 0)
MAX5481–MAX5484
17
Maxim Integrated
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