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參數(shù)資料
| 型號(hào)： | MAX5532EUA+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 11/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 12BIT DUAL ULP 8-UMAX |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 設(shè)置時(shí)間： | 660µs |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 471mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-TSSOP，8-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-uMAX |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 2 電壓，單極；2 電壓，雙極 |
| 采樣率（每秒）： | * |
MAX5532–MAX5535
Dual, Ultra-Low-Power,
12-Bit, Voltage-Output DACs
______________________________________________________________________________________
19
Voltage Biasing a
Current-Output Transducer
See the circuit in Figure 5 for an illustration of how to
configure the MAX5534/MAX5535 to bias a current-out-
put transducer. In Figure 5, the output voltage of the
MAX5534/MAX5535 is a function of the voltage drop
across the transducer added to the voltage drop
across the feedback resistor R.
Unipolar Output
Figure 6 shows the MAX5534 in a unipolar output con-
figuration with unity gain. Table 4 lists the unipolar out-
put codes.
Bipolar Output
The MAX5534 output can be configured for bipolar
operation as shown in Figure 7. The output voltage is
given by the following equation:
VOUT_ = VREFIN x [(NA - 2048) / 2048]
where NA represents the decimal value of the DAC’s
binary input code. Table 5 shows the digital codes (off-
set binary) and the corresponding output voltage for
the circuit in Figure 7.
Configurable Output Gain
The MAX5534/MAX5535 have force-sense outputs,
which provide a connection directly to the inverting termi-
nal of the output op-amp, yielding the most flexibility. The
advantage of the force-sense output is that specific gains
can be set externally for a given application. The gain
error for the MAX5534/MAX5535 is specified in a unity-
gain configuration (op-amp output and inverting termi-
nals connected), and additional gain error results from
external resistor tolerances. Another advantage of the
force-sense DAC is that it allows many useful circuits to
be created with only a few simple external components.
An example of a custom fixed gain using the MAX5534/
MAX5535 force-sense output is shown in Figure 8. In
this example, R1 and R2 set the gain for VOUTA.
VOUTA = [(VREFIN x NA) / 4096] x [1 + (R2 / R1)]
where NA represents the numeric value of the DAC
input code.
Self-Biased Two-Electrode
Potentiostat Application
See the circuit in Figure 10 for an illustration of how to
use the MAX5535 to bias a two-electrode potentiostat
on the input of an ADC.
Power Supply and
Bypassing Considerations
Bypass the power supply with a 0.1F capacitor to GND.
Minimize lengths to reduce lead inductance. If noise
becomes an issue, use shielding and/or ferrite beads to
increase isolation. For the thin QFN package, connect the
exposed pad to ground.
Layout Considerations
Digital and AC transient signals coupling to GND can
create noise at the output. Use proper grounding tech-
niques, such as a multilayer board with a low-inductance
ground plane. Wire-wrapped boards and sockets are not
recommended. For optimum system performance, use
printed circuit (PC) boards. Good PC board ground lay-
out minimizes crosstalk between DAC outputs, reference
inputs, and digital inputs. Reduce crosstalk by keeping
analog lines away from digital lines.
Table 4. Unipolar Code Table (Gain = +1)
DAC CONTENTS
MSB
LSB
ANALOG OUTPUT
1111
+VREF (4095/4096)
1000
0000
0001
+VREF (2049/4096)
1000
0000
+VREF (2048/4096) = +VREF / 2
0111
1111
+VREF (2047/4096)
0000
0001
+VREF (1/4096)
0000
0V
Table 5. Bipolar Code Table (Gain = +1)
DAC CONTENTS
MSB
LSB
ANALOG OUTPUT
1111
+VREF (2047/2048)
1000
0000
0001
+VREF (1/2048)
1000
0000
0V
0111
1111
-VREF (1/2048)
0000
0001
-VREF (2047/2048)
0000
-VREF (2048/2048) = -VREF
NA IS THE DAC INPUT CODE
(0 TO 4095 DECIMAL).
REFIN
MAX5534
OUT_
FB_
VOUT =
VREFIN
× NA
4096
DAC
Figure 6. Unipolar Output Circuit
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