參數(shù)資料
型號: MAX5774EVKIT+
廠商: Maxim Integrated Products
文件頁數(shù): 13/28頁
文件大?。?/td> 0K
描述: KIT EVAL FOR MAX5774
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 1
DAC 的數(shù)量: 32
位數(shù): 14
數(shù)據(jù)接口: 串行
設(shè)置時間: 20µs
DAC 型: 電壓
工作溫度: 0°C ~ 85°C
已供物品:
已用 IC / 零件: MAX5774
MAX5773/MAX5774/MAX5775
Gain and Offset Registers
The MAX5773/MAX5774/MAX5775 contain a gain and
offset register associated with each channel to correct
real-time gain and offset errors associated with each
channel. The gain and offset registers can be
accessed individually or in pairs.
The gain word range is limited between 0 and 1. The
gain word is an unsigned 14-bit data word. A gain word
of 0000h is a special mapping to provide a gain of
absolute one, i.e., no gain correction. For all the other
gain word codes, the amount of gain correction varies
proportionally to the gain word’s decimal value. For
example, a gain word of 0001h is equivalent to a gain
of 0.514 and a gain of 3FFFh is equivalent to 1 - 0.514
(see Table 9). To access the gain register, set control
bits C3–C0 = 1000 (see Tables 7 and 8).
The offset has a range from -FS/2 to + (FS/2 - 1 LSB).
The offset word is a 14-bit data word represented in
two’s complement. For example, an offset word equiva-
lent to 1FFFh would provide an offset of FS/2 - 1 LSB
and offset word of 2000h would provide an offset of
-FS/2 (see Table 10). To access the offset register, set
control bits C3–C0 = 1001 (see Tables 7 and 8).
Configuration Register
The configuration register controls the advanced fea-
tures of the MAX5773/MAX5774/MAX5775. Write to the
configuration register by setting control bits C3–C0 =
1100 and address bits 000000. Table 11 shows the
configuration register data format for the D13–D0 data
bits. Table 12 shows the commands controlled by the
configuration register.
DSP Mode (
DSP)
The MAX5773/MAX5774/MAX5775 provide a hardware-
selectable DSP-interface mode. The active-low DSP
logic input selects the microcontroller (C)-interface or
DSP-interface mode. Drive DSP high for C-interface
mode. Drive DSP low for DSP-interface mode. DSP
mode, when active, allows chip select (CS) to go high
before the entire 32-bit command word is clocked in.
Figure 1 illustrates serial timing for both C- and DSP-
interface modes.
SING
When SING = 0, the MAX5773/MAX5774/MAX5775 are
in daisy-chain mode
. For daisy-chain operation, set
DSP high (C mode) and SING = 0.
32-Channel, 14-Bit, Voltage-Output
DACs with Serial Interface
20
______________________________________________________________________________________
CONTROLLER
DEVICE
DIN(0)
DOUT(0)
1
SCLK
CS
DSP
MAX577_
DIN(1)
DOUT(1)
SCLK
CS
DSP
MAX577_
DIN(2)
DOUT(2)
SCLK
CS
DSP
MAX577_
Figure 5. Daisy-Chain Configuration
CODE (DATA BITS D13–D0)
GAIN VALUE
0000h
Unity Gain
0001h
0.000061
0002h
0.00012
::
1FFFh
0.499938
2000h
0.5
::
3FFEh
0.999877
3FFFh
0.999938
Table 9. Gain Register Code Values
CODE (DATA BITS D13–D0)
OFFSET VALUE*
1FFFh
FS/2 - 1 LSB
::
0001h
+1 LSB
0000h
0
3FFFh
-1 LSB
::
2000h
-FS/2
Table 10. Offset Register Code Values
*
1 LSB = FS/214
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