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參數(shù)資料
| 型號(hào)： | MAX5821MEUA+T |
| 廠商： | Maxim Integrated Products |
| 文件頁(yè)數(shù)： | 11/13頁(yè) |
| 文件大小： | 0K |
| 描述： | IC DAC 10BIT DL 2WIRE SER 8-UMAX |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 設(shè)置時(shí)間： | 4µs |
| 位數(shù)： | 10 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-TSSOP，8-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-uMAX |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 2 電壓，單極 |
| 采樣率（每秒）： | * |
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Detailed Description
The MAX5821 is a dual, 10-bit, voltage-output DAC with
an I2C/SMBus-compatible 2-wire interface. The
device consists of a serial interface, power-down cir-
cuitry, dual input and DAC registers, two 10-bit resistor
string DACs, two unity-gain output buffers, and output
resistor networks. The serial interface decodes the
address and control bits, routing the data to the proper
input or DAC register. Data can be directly written to
the DAC register, immediately updating the device out-
put, or can be written to the input register without
changing the DAC output. Both registers retain data as
long as the device is powered.
DAC Operation
The MAX5821 uses a segmented resistor string DAC
architecture, which saves power in the overall system
and guarantees output monotonicity. The MAX5821’s
input coding is straight binary, with the output voltage
given by the following equation:
where N = 10 (bits), and D = the decimal value of the
input code (0 to 1023).
Output Buffer
The MAX5821 analog outputs are buffered by preci-
sion, unity-gain followers that slew 0.5V/s. Each buffer
output swings rail-to-rail, and is capable of driving 5k
in parallel with 200pF. The output settles to ±0.5LSB
within 4s.
Power-On Reset
The MAX5821 features an internal POR circuit that ini-
tializes the device upon power-up. The DAC registers
are set to zero scale and the device is powered down,
with the output buffers disabled and the outputs pulled
to GND through the 100k
termination resistor.
Following power-up, a wake-up command must be initi-
ated before any conversions are performed.
Power-Down Modes
The MAX5821 has three software-controlled low-power
power-down modes. All three modes disable the output
buffers and disconnect the DAC resistor strings from
REF, reducing supply current draw to 1A and the ref-
erence current draw to less than 1A. In power-down
mode 0, the device output is high impedance. In
power-down mode 1, the device output is internally
pulled to GND by a 1k
termination resistor. In power-
down mode 2, the device output is internally pulled to
GND by a 100k
termination resistor. Table 1 shows
the power-down mode command words.
Upon wake-up, the DAC output is restored to its previ-
ous value. Data is retained in the input and DAC regis-
ters during power-down mode.
Digital Interface
The MAX5821 features an I2C/SMBus-compatible 2-
wire interface consisting of a serial data line (SDA) and
a serial clock line (SCL). The MAX5821 is SMBus com-
patible within the range of VDD = 2.7V to 3.6V. SDA and
SCL facilitate bidirectional communication between the
MAX5821 and the master at rates up to 400kHz. Figure
1 shows the 2-wire interface timing diagram. The
MAX5821 is a transmit/receive slave-only device, rely-
ing upon a master to generate a clock signal. The mas-
ter (typically a microcontroller) initiates data transfer on
the bus and generates SCL to permit that transfer.
A master device communicates to the MAX5821 by
transmitting the proper address followed by command
and/or data words. Each transmit sequence is framed
by a START (S) or REPEATED START (Sr) condition and
a STOP (P) condition. Each word transmitted over the
V
VD
OUT
REF
N
_
()
=
×
2
MAX5821
Dual, 10-Bit, Low-Power, 2-Wire, Serial
Voltage-Output DAC
_______________________________________________________________________________________
7
Pin Description
PIN
NAME
FUNCTION
1VDD
Power Supply
2
GND
Ground
3
ADD
Address Select. A logic high sets the address LSB to 1; a logic low sets the address LSB to zero.
4
SCL
Serial Clock Input
5
SDA
Bidirectional Serial Data Interface
6
REF
Reference Input
7
OUTA
DAC A Output
8
OUTB
DAC B Output
SMBus is a trademark of Intel Corporation.
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參數(shù)描述 |
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| MAX5822LEUA | 功能描述:數(shù)模轉(zhuǎn)換器- DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| MAX5822LEUA+ | 功能描述:數(shù)模轉(zhuǎn)換器- DAC 12-Bit 2Ch Precision DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| MAX5822LEUA+T | 功能描述:數(shù)模轉(zhuǎn)換器- DAC 12-Bit 2Ch Precision DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| MAX5822LEUA-T | 功能描述:數(shù)模轉(zhuǎn)換器- DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| MAX5822MEUA | 功能描述:數(shù)模轉(zhuǎn)換器- DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
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