The overvoltag" />
參數(shù)資料
型號(hào)： MAX6499ATA+T
廠商： Maxim Integrated Products
文件頁(yè)數(shù)： 3/16頁(yè)
文件大?。?/td> 0K
描述： IC CTLR PROT SW 8-TDFN
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 1
電壓 - 工作： 72V
技術(shù)： 混合技術(shù)
功率（瓦特）： 1.45W
電路數(shù)： 1
應(yīng)用： 通用
封裝/外殼： 8-WDFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝： 8-TDFN-EP（3x3）
包裝： 標(biāo)準(zhǔn)包裝
其它名稱(chēng)： MAX6499ATA+TDKR
MAX6495–MAX6499
72V, Overvoltage-Protection Switches/
Limiter Controllers with an External MOSFET
11
Maxim Integrated
The overvoltage waveform period (tOV)
The power dissipated across the package (PDISS)
During an initial overvoltage occurrence, the discharge
time (Δt1) of COUT, caused by IOUT and IGATEPD. The
discharge time is approximately:
where VOV is the overvoltage threshold, IOUT is the load
current, and IGATEPD is the GATE’s 100mA pulldown
current.
Upon OUT falling below the threshold point, the
MAX6495/MAX6496/MAX6499s’ charge-pump current
must recover and begins recharging the external GATE
voltage. The time needed to recharge GATE from -VD to
the MOSFET’s gate threshold voltage is:
where CISS is the MOSFET’s input capacitance,
VGS(TH) is the MOSFET’s gate threshold voltage, VD is
the internal clamp (from OUTFB to GATE) diode’s for-
ward voltage (1.5V, typ) and IGATE is the charge-pump
current (100A typ).
During Δt2, COUT loses charge through the output load.
The voltage across COUT (ΔV2) decreases until the
MOSFET reaches its VGS(TH) threshold and can be
approximated using the following formula:
Once the MOSFET VGS(TH) is obtained, the slope of the
output-voltage rise is determined by the MOSFET Qg
charge through the internal charge pump with respect
to the drain potential. The new rise time needed to
reach a new overvoltage event can be calculated using
the following formula:
where QGD is the gate-to-drain charge.
The total period of the overvoltage waveform can be
summed up as follows:
ΔtOV = Δt1 + Δt2 + Δt3
The MAX6495/MAX6496/MAX6499 dissipate the most
power during an overvoltage event when IOUT = 0. The
maximum power dissipation can be approximated
using the following equation:
The die-temperature increase is related to
θJC (8.3°C/W
and 8.5°C/W for the MAX6495/MAX6496/MAX6499,
respectively) of the package when mounted correctly
with a strong thermal contact to the circuit board. The
MAX6495/MAX6496/MAX6499 thermal shutdown is
governed by the equation:
TJ = TA + PDISS (
θJC +θCA) < +170°C
Based on these calculations, the parameters of the
MOSFET, the overvoltage threshold, the output load
current, and the output capacitors are external vari-
ables affecting the junction temperature. If these para-
meters are fixed, the junction temperature can also be
affected by increasing Δt3, which is the time the switch
is on. By increasing the capacitance at the GATE pin,
Δt3 increases as it increases the amount of time
required to charge up this additional capacitance
(75A gate current). As a result, ΔtOV increases, there-
by reducing the power dissipated (PDISS).
PV
I
t
DISS
OV
GATEPD
OV
.
=×
×
0 975
1
Δ
t
Q
V
I
GD
GS
OUT
GATE
3
Δ
VI
t
C
OUT
2
=
ΔtC
VV
I
ISS
GS TH
D
GATE
2
()
=
+
ΔtC
V
II
OUT
OV
OUT
GATEPD
1
005
.
(
)
=
×
+
Δt2
Δt1
GATE
OUTFB
ΔtOV
Δt3
Figure 5. MAX6495/MAX6496/MAX6499 Timing
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