參數(shù)資料
型號: MAX649
廠商: Maxim Integrated Products, Inc.
英文描述: Eval Board for ISL6527 Single Synchronous Buck Pulse-Width Modulation (PWM) Controller
中文描述: 5V/3.3V/3V或可調(diào)、高效率、低IQ、降壓型DC-DC控制器
文件頁數(shù): 12/13頁
文件大?。?/td> 261K
代理商: MAX649
MAX6443–MAX6452
a microprocessor for general-purpose I/O control. MR2
monitors a switch to detect when a smart card is inserted.
When the switch is closed high (card inserted), RESET
one-shot pulses low for 140ms. MR2 is internally
debounced for 210ms to prevent false resets when the
smart card is removed.
Interfacing to Other Voltages
for Logic Compatibility
The open-drain RESET output can be used to interface
to a P with other logic levels. As shown in Figure 8, the
open-drain output can be connected to voltages from 0
to 6V.
Generally, the pullup resistor connected to the RESET
connects to the supply voltage that is being monitored
at the IC’s VCC pin. However, some systems may use
the open-drain output to level-shift from the monitored
supply to reset circuitry powered by some other supply
(Figure 8). Keep in mind that as the supervisor’s VCC
decreases toward 1V, so does the IC’s ability to sink
current at RESET. RESET is pulled high as VCC decays
toward 0. The voltage where this occurs depends on
the pullup resistor value and the voltage to which it is
connected.
Ensuring a Valid RESET Down to
VCC = 0V (Push-Pull RESET)
When VCC falls below 1V, RESET current-sinking capa-
bilities decline drastically. The high-impedance CMOS-
logic inputs connected to RESET can drift to
undetermined voltages. This presents no problems in
most applications, because most Ps and other circuitry
do not operate with VCC below 1V.
In applications in which RESET must be valid down to
0V, add a pulldown resistor between RESET and GND
for the push-pull outputs. The resistor sinks any stray
leakage currents, holding RESET low (Figure 9). The
value of the pulldown resistor is not critical; 100k
is
large enough not to load RESET and small enough to
pull RESET to ground. The external pulldown cannot be
used with the open-drain reset outputs.
Transient Immunity
In addition to issuing a reset to the P during power-up,
power-down, and brownout conditions, these supervi-
sors are relatively immune to short-duration falling tran-
sients (glitches). The graph Maximum Transient Duration
vs. Reset Threshold Overdrive in the Typical Operating
Characteristics section shows this relationship.
P Reset Circuits with Long Manual Reset
Setup Period
8
_______________________________________________________________________________________
MAX6451
P
VCC
RSTIN
RESET
DIGITAL INPUT
I/O SUPPLY
CORE SUPPLY
+3.3V
+1.5V
RESET
MR1
MR2
GND
FRONT-PANEL SWITCH
STANDARD
P INPUT
AND 6.72s MANUAL
RESET DELAY
SMART CARD DETECT:
IMMEDIATE ONE-SHOT
WHEN MANUAL
RESET CLOSES
Figure 7. MAX6451/MAX6452 Application Circuit
MAX6444
MAX6446
MAX6448
MAX6450
MAX6452
P
RESET
GND
VCC
5V
3.3V
100k
N
Figure 8. Interfacing to Other Voltage Levels
相關(guān)PDF資料
PDF描述
MAX6453UT16S+ µP Supervisors with Separate VCC Reset and Manual Reset Outputs
MAX6453UT16S+T µP Supervisors with Separate VCC Reset and Manual Reset Outputs
MAX6453UT23S+T µP Supervisors with Separate VCC Reset and Manual Reset Outputs
MAX6453UT26S+T µP Supervisors with Separate VCC Reset and Manual Reset Outputs
MAX6453UT29S+ µP Supervisors with Separate VCC Reset and Manual Reset Outputs
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