![](http://datasheet.mmic.net.cn/390000/MAX667_datasheet_16818720/MAX667_3.png)
M
+5V /Programmable Low-Dropout
Voltage Regulator
_______________________________________________________________________________________
3
1000
1
1
10
100
1000
DROPOUT VOLTAGE
vs. LOAD CURRENT
10
100
M
LOAD CURRENT (mA)
D
QUIESCENT CURRENT
vs. LOAD CURRENT
Q
μ
A
10
100
1000
10,000
100,000
0.01
0.1
1
10
100
1000
M
LOAD CURRENT (mA)
VIN = +6V
1000
1
0
50
150
250
10
100
M
100
200
DD OUTPUT CURRENT
vs. INPUT-OUTPUT DIFFERENCE
D
μ
A
INPUT-OUTPUT DIFFERENCE (mV)
5 10
1
20 50 100mA LOAD
2
__________________________________________Typic al Operating Charac teristic s
(T
A
= +25°C, unless otherwise noted.)
_____________________Pin Desc ription
_______________Detailed Desc ription
Figure 1 shows a micropower bandgap reference, an
error amplifier, a PNP pass transistor, and two com-
parators as the main elements of the MAX667. One
comparator, C1, selects the fixed 5V or adjustable
operation with an external voltage divider. The other
comparator, C2, is a low-battery detector.
The bandgap reference, which is trimmed to 1.22V,
connects internally to one input of the error amplifier,
A1. The feedback signal from the regulator output sup-
plies the other input of A1 from either an on-chip volt-
age divider or two external resistors. When SET is
grounded, the internal divider provides the error ampli-
fier feedback signal for a fixed 5V output. When SET is
more than 50mV above ground, the error amplifier’s
input switches directly to SET while an external resistor
divider from OUT determines the output voltage.
A second comparator, C2, compares the LBI input to
the internal reference voltage. LBO is an open-drain
FET connected to GND. The low-battery threshold can
also be set with a voltage divider at LBI. In addition, the
MAX667 has a shutdown input (SHDN) that disables
the load and the device while reducing quiescent cur-
rent when it is pulled high.
+5V Output
Figure 2 shows the connection for a fixed 5V output.
The SET input is grounded, and no external resistors
are required. Figure 3 shows adjustable output opera-
tion. R1 and R2 set the output voltage. SHDN should be
grounded if not used.
(Output) Voltage Set, CMOS Input.
Connect to GND for 5V output. For
other voltages, connect external resis-
tive divider from OUT.
Low-Battery Output. An open-drain N-
channel transistor that sinks current to
GND when LBI is less than 1.22V.
SET
6
LBO
7
Positive Input Voltage (unregulated)
IN
8
Regulated Output Voltage. OUT falls
to 0V when SHDN is above 1.5V. SET
determines output voltage when SET
is above 50mV; otherwise, it is 5V.
OUT must be connected to an output
filter capacitor.
OUT
2
Low-Battery Detector. A CMOS input
to an internal 1.255V comparator
whose output is the LBO pin.
LBI
3
Ground
GND
4
Shutdown Input. Connect to GND for
normal operation (output active). Pull
above 1.5V to disable OUT, LBO, and
DD and to reduce quiescent current to
less than 1μA.
SHDN
5
PIN
Dropout Detector Output—the collec-
tor of a PNP pass transistor. Normally
an open circuit, it sources current as
dropout is reached.
DD
1
FUNCTION
NAME