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參數(shù)資料
| 型號： | MAX667 |
| 廠商： | Maxim Integrated Products, Inc. |
| 英文描述： | +5V/Programmable Low-Dropout Voltage Regulator(5V/可調(diào),低輸出步降線性穩(wěn)壓器) |
| 中文描述： | +5V可調(diào)、低壓差穩(wěn)壓器 |
| 文件頁數(shù)： | 8/8頁 |
| 文件大?。?/td> | 96K |
| 代理商： | MAX667 |
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
8
___________________Maxim Integrated Produc ts, 120 S an Gabriel Drive, S unnyvale, CA 94086 (408) 737-7600
1994 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
M
+5V /Programmable Low-Dropout
Voltage Regulator
ratio (PSRR) is therefore not specified. Since the output
must be connected to a 10μF or larger filter capacitor,
the capacitor characteristics dominate the PSRR. Large
values of input and output capacitors reduce the ripple.
In addition, both DD and LBI/LBO can trigger on the
lowest DC component of the ripple, particularly at high
load currents. In the case of the low-battery detector,
the ripple can be effectively filtered out by placing a
capacitor to ground in parallel with the LBI input pin.
The high resistance values that can be used for the
voltage divider allow relatively small capacitance val-
ues to form an effective lowpass filter at 120Hz. When
power is first applied, however, this filter tends to hold
LBO low longer than normal.
T ransient Considerations
The low operating current and gain-bandwidth product
of the internal reference and amplifier result in limited
rejection of fast-step input changes. Negative-going
steps, which occur in under 100μs, may turn off the out-
put for several milliseconds. An input filter (nominally
10μF) is recommended if input changes greater than
1V and faster than 100μs (other than turn-on or turn-off)
are anticipated. Figure 12 shows the output response
to a 10mA/100mA instantaneous load step. The rela-
tionship between output-capacitor ESR and load-tran-
sient response is explained in the Output Capacitor
section.
___________________Chip Topography
OUTPUT
CURRENT
+5V OUTPUT
0.1V/div
100mA
10mA
200
μ
s/div
Figure 12. Output Response to 10mA/100mA Load Step with
10
μ
F Output Capacitor (1.5
ESR)
LBO
SET
LBI
OUT
DD
IN
SHDN
GND
0.107"
(2.71mm)
0.070"
(1.78mm)
TRANSISTOR COUNT: 65
SUBSTRATE MUST BE LEFT UNCONNECTED
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