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參數(shù)資料
| 型號： | MAX7360ETL+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 3/32頁 |
| 文件大小： | 0K |
| 描述： | IC CTRLR KEY-SW I2C 40TQFN-EP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 類型： | 控制器 |
| 輸入類型： | 邏輯 |
| 輸出類型： | 邏輯 |
| 接口： | I²C，2 線串口 |
| 電流 - 電源： | 50µA |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 40-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 40-TQFN-EP（5x5） |
| 包裝： | 帶卷 (TR) |
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11
Maxim Integrated
I2C-Interfaced Key-Switch Controller and LED
Driver/GPIOs with Integrated ESD Protection
MAX7360
The settings in this register are ignored for ports not con-
figured as GPOs, and a read from this register returns
the values stored in the register (see Table 11 in the
Register Tables section).
Autorepeat Register (0x05)
The MAX7360 autorepeat feature notifies the host that at
least one key has been pressed for a continuous period.
The autorepeat register enables or disables this feature,
sets the time delay after the last key event before the key
repeat code (0x7E) is entered into the FIFO, and sets the
frequency at which the key-repeat code is entered into
the FIFO thereafter. Bit D7 specifies whether the auto-
repeat function is enabled with 0 denoting autorepeat
disabled, and 1 denoting autorepeat enabled. Bits D0–
D3 specify the autorepeat delay in terms of debounce
cycles ranging from 8–128 debounce cycles (see Table
12 in the Register Tables section). Bits D4, D5, and D6
specify the autorepeat rate or frequency ranging from
4–32 debounce cycles.
When autorepeat is enabled, holding the key pressed
results in a key-repeat event that is denoted by 0x7E. The
key being pressed does not show up again in the FIFO.
Only one autorepeat code is entered into the FIFO,
regardless of the number of keys pressed. The auto-
repeat code continues to be entered in the FIFO at the
frequency set by bits D[4:6] until another key event is
recorded. Following the key-release event, if any keys
are still pressed, the MAX7360 restarts the autorepeat
sequence.
Autosleep Register (0x06)
Autosleep puts the MAX7360 in sleep mode to draw
minimal current. When enabled, the MAX7360 enters
sleep mode if no keys are pressed for the autosleep time
(see Table 13 in the Register Tables section).
Key-Switch Sleep Mode
In sleep mode, the MAX7360 draws minimal current.
Switch-matrix current sources are turned off and pulled
up to VCC. When autosleep is enabled, key-switch
inactivity for a period longer than the autosleep time
puts the part into sleep mode (FIFO data is maintained).
Writing a 1 to D7 in the configuration register, or a key-
press, can take the MAX7360 out of sleep mode. Bit D7
in the configuration register gives the sleep-mode status
and can be read any time. The FIFO data is maintained
while in sleep mode.
Autowake
Keypresses initiate autowake and the MAX7360 goes
into operating mode. Keypresses that autowake the
MAX7360 are not lost. When a key is pressed while the
MAX7360 is in sleep mode, all analog circuitry, including
switch-matrix current sources, turn on in 2ms. The initial
key needs to be pressed for 2ms plus the debounce time
to be stored in the FIFO. Write a 0 to D1 in the configura-
tion register (0x01) to disable autowakeup.
GPIOs
The MAX7360 has eight GPIO ports with LED control
functions. The ports can be used as logic inputs, logic
outputs, or constant-current PWM LED drivers. In addi-
tion, PORT7 and PORT6 can function as a rotary switch
input pair. When in PWM mode, the ports are set up
to start their PWM cycle in 45N phase increments. This
prevents large current spikes on the LED supply voltage
when driving multiple LEDs.
GPIO Global Configuration Register (0x40)
The GPIO global configuration register controls the main
settings for the eight GPIOs (see Table 14 in the Register
Tables section).
Bit D7 enables PORT[7:6] as inputs for a rotary switch.
Bit D5 enables interrupt generation for I2C timeouts. D4
is the main enable/shutdown bit for the GPIOs. D3 func-
tions as a software reset for the GPIO registers (0x40 to
0x5F). Bits D[2:0] set the fade in/out time for the GPIOs
configured as constant-current sinks.
GPIO Control Register (0x41)
The GPIO control register configures each port as either
an input or an output (see Table 15 in the Register Tables
section). All GPIOs allow individual configurations, and
power up as inputs. Enabling rotary switch mode auto-
matically sets D7 and D6 as inputs. The ports consume
additional current if their inputs are left undriven.
GPIO Debounce Configuration Register (0x42)
The GPIO debounce configuration register sets the
amount of time a GPIO must be held for the MAX7360
to register a logic transition (see Table 16 in the Register
Tables section). The GPIO debounce setting is inde-
pendent of the key-switch debounce setting. Five bits
(D[4:0]) set 32 possible debounce times from 9ms up
to 40ms.
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