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參數(shù)資料
| 型號(hào)： | MAX9123EUE+ |
| 廠商： | Maxim Integrated Products |
| 文件頁(yè)數(shù)： | 8/10頁(yè) |
| 文件大小： | 0K |
| 描述： | IC INTERFACE |
| 產(chǎn)品培訓(xùn)模塊： | Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 96 |
| 系列： | * |
MAX9123
Quad LVDS Line Driver with
Flow-Through Pinout
_______________________________________________________________________________________
7
Eliminate reflections and ensure that noise couples as
common mode by running the differential trace pairs
close together. Reduce skew by matching the electrical
length of the traces. Excessive skew can result in a
degradation of magnetic field cancellation.
Maintain the distance between the differential traces to
avoid discontinuities in differential impedance. Avoid
90° turns and minimize the number of vias to further
prevent impedance discontinuities.
Cables and Connectors
Transmission media should have a nominal differential
impedance of 100
. To minimize impedance disconti-
nuities, use cables and connectors that have matched
differential impedance.
Avoid the use of unbalanced cables such as ribbon or
simple coaxial cable. Balanced cables such as twisted
pair offer superior signal quality and tend to generate
less EMI due to canceling effects. Balanced cables
tend to pick up noise as common mode, which is
rejected by the LVDS receiver.
Board Layout
For LVDS applications, a four-layer PC board that pro-
vides separate power, ground, LVDS signals, and input
signals is recommended. Isolate the LVTTL/LVCMOS
and LVDS signals from each other to prevent coupling.
Chip Information
TRANSISTOR COUNT: 1246
PROCESS: CMOS
V OS
VCC
GND
IN_
RL/2
VOS
VOD
OUT_-
OUT_+
RL
CL
OUT_ +
OUT_ -
CL
50
IN_
GENERATOR
Figure 1. Driver VOD and VOS Test Circuit
Figure 2. Driver Propagation Delay and Transition Time Test
Circuit
0
VOH
VOL
IN_
OUT_ -
OUT_+
VDIFF
3V
tPHLD
1.5V
0
tTHL
20%
0
80%
0
tTLH
20%
0 DIFFERENTIAL
tPLHD
1.5V
VDIFF = (VOUT_+) - (VOUT_-)
Figure 3. Driver Propagation Delay and Transition Time Waveforms
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| VE-2WP-IW-F1 | CONVERTER MOD DC/DC 13.8V 100W |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX9123EUE+ | 功能描述:LVDS 接口集成電路 Quad LVDS Line Driver RoHS:否 制造商:Texas Instruments 激勵(lì)器數(shù)量:4 接收機(jī)數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel |
| MAX9123EUE+G60 | 功能描述:LVDS 接口集成電路 Quad LVDS Line Transmitter with Flow-Through Pinout RoHS:否 制造商:Texas Instruments 激勵(lì)器數(shù)量:4 接收機(jī)數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel |
| MAX9123EUE+T | 功能描述:LVDS 接口集成電路 Quad LVDS Line Driver RoHS:否 制造商:Texas Instruments 激勵(lì)器數(shù)量:4 接收機(jī)數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel |
| MAX9123EUE+TG60 | 功能描述:LVDS 接口集成電路 Quad LVDS Line Driver with Flow-Through Pinout RoHS:否 制造商:Texas Instruments 激勵(lì)器數(shù)量:4 接收機(jī)數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel |
| MAX9123EUE-T | 功能描述:LVDS 接口集成電路 RoHS:否 制造商:Texas Instruments 激勵(lì)器數(shù)量:4 接收機(jī)數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel |
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