參數(shù)資料
型號： MAX9156EXT-T
廠商： MAXIM INTEGRATED PRODUCTS INC
元件分類： 通用總線功能
英文描述： Low-Jitter, Low-Noise LVPECL-to-LVDS Level Translator in an SC70 Package
中文描述： PECL TO LVDS TRANSLATOR, COMPLEMENTARY OUTPUT, PDSO6
封裝： SC-70, 6 PIN
文件頁數(shù)： 2/8頁
文件大?。?/td> 149K
代理商： MAX9156EXT-T
M
Low-Jitter, Low-Noise LVPECL-to-LVDS Level
Translator in an SC70 Package
2
_______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
V
CC
to GND...........................................................-0.3V to +4.0V
IN+, IN- to GND.....................................................-0.3V to +4.0V
OUT+, OUT- to GND.............................................-0.3V to +4.0V
Short-Circuit Duration (OUT+, OUT-).........................Continuous
Continuous Power Dissipation (T
A
= +70°C)
6-Pin SC70 (derate 3.1mW/°C above +70°C)..............245mW
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Storage Temperature Range.............................-65°C to +150°C
Junction Temperature......................................................+150°C
Operating Temperature Range ...........................-40°C to +85°C
ESD Protection
Human Body Model, IN+, IN-, OUT+, OUT-....................±8kV
Lead Temperature (soldering, 10s).................................+300°C
DC ELECTRICAL CHARACTERISTICS
(V
CC
= +3.0V to +3.6V, R
L
= 100
±1%,
|
V
ID
|
= 0.05V to V
CC
, V
CM
=
|
V
ID
/ 2
|
to V
CC
-
|
V
ID
/ 2
|
, T
A
= -40°C to +85°C, unless otherwise
noted. Typical values at V
CC
= +3.3V, T
A
= +25°C.) (Notes 1, 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
U N T S
LVPECL INPUT
Differential Input High Threshold
Differential Input Low Threshold
Input Resistor
V
TH
V
TL
R
IN
7
-7
50
mV
mV
k
-50
360
-10
-10
-10
-10
Figure 1
IN+ = 3.6V, IN- = 0
IN+ = 0, IN- = 3.6V
1328
2.7
2.7
2.7
2.7
10
10
10
10
Input Current
I
IN+
, I
IN-
μA
IN+ = 3.6V, IN- = 0
IN+ = 0, IN- = 3.6V
Power-Off Input Current
I
IN+
, I
IN-
V
CC
= 0,
Figure 1
μA
LVDS OUTPUT
Differential Output Voltage
Differential Output Voltage
Offset (Common-Mode) Voltage
V
OD
V
OD
V
OS
Figure 2
Figure 2
Figure 2
250
360
0.008
1.25
450
25
1.375
mV
mV
V
1.125
Change in V
OS
for
Complementary Output States
V
OS
Figure 2
0.005
25
mV
Output High Voltage
Output Low Voltage
Differential Output Voltage
V
OH
V
OL
V
OD+
1.44
1.08
+360
0.02
0.02
260
-5
-5
1.6
V
V
0.9
+250
-10
-10
100
IN+, IN- open
+450
10
10
400
-15
-15
mV
O U T+ = 3.6V other outp ut op en
O U T- = 3.6V other outp ut op en
V
CC
= +3.6V or 0
V
ID
= +50mV, OUT+ = GND
V
ID
= -50mV, OUT- = GND
Power-Off Output Leakage
Current
IO
OFF
V
CC
= 0
μA
Differential Output Resistance
RO
DIFF
Output Short Current
I
SC
mA
POWER SUPPLY
Supply Current
I
CC
10
15
mA
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