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參數(shù)資料
| 型號： | MAX9157EGJ+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 2/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC TXRX QUAD LVDS 32-TQFN |
| 產(chǎn)品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 60 |
| 類型： | 收發(fā)器 |
| 驅動器/接收器數(shù)： | 4/4 |
| 規(guī)程： | LVDS |
| 電源電壓： | 3 V ~ 3.6 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-WFQFN 裸露焊盤 |
| 供應商設備封裝： | 32-TQFN-EP（5x5） |
| 包裝： | 管件 |
MAX9157
matching the differential impedance of the bus (taking
into account any reduced impedance due to loading).
Traces, Cables, and Connectors
The characteristics of input and output connections
affect the performance of the MAX9157. Use con-
trolled-impedance traces, cables, and connectors with
matched characteristic impedance.
Ensure that noise couples as common mode by run-
ning the traces of a differential pair close together.
Reduce within-pair skew by matching the electrical
length of the traces of a differential pair. Excessive
skew can result in a degradation of magnetic field can-
cellation. Maintain the distance between traces of a dif-
ferential pair to avoid discontinuities in differential
impedance. Minimize the number of vias to further pre-
vent impedance discontinuities.
Avoid the use of unbalanced cables, such as ribbon
cable. Balanced cables, such as twisted pair, offer
superior signal quality and tend to generate less EMI
due to canceling effects. Balanced cables tend to pick
up noise as common mode, which is rejected by the
receiver.
Board Layout
A four-layer PC board that provides separate power,
ground, input, and output signals is recommended.
Keep the LVTTL/LVCMOS and BLVDS signals separat-
ed to prevent coupling.
Quad Bus LVDS Transceiver
10
______________________________________________________________________________________
INPUTS
OUTPUTS
RE_
VID = (VDO_+/RIN_+) - (VDO_-/RIN_-)
RO_
LVID < -100mV
L
LVID > 100mV
H
L
Fail-safe operation guaranteed when
DO_+/RIN_+ and DO_-/RIN_- are
open, undriven and shorted, or
undriven and parallel terminated
H
HX
Z
Table 3. Receiver Mode
PIN
INTERNAL RESISTOR
DE12
Pulldown to GND
DE34
Pulldown to GND
RE12
Pullup to VCC
RE34
Pullup to VCC
DIN_
Pullup to VCC
Table 4. Input Internal Pullup/Pulldown
Resistors
RL
CL
DO_+/RIN_+
DO_-/RIN_-
CL
50
DIN_
GENERATOR
Figure 3. Driver Propagation Delay and Transition Time Test Circuit
V OS
VCC
GND
DIN_
RL/2
VOS
VOD
DO_-/RIN_-
D0_+/RIN_+
Figure 2. Driver VOD and VOS Test Circuit
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MAX9157EGJ+ | 功能描述:LVDS 接口集成電路 Quad Bus LVDS Transceiver RoHS:否 制造商:Texas Instruments 激勵器數(shù)量:4 接收機數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel |
| MAX9157EGJ+T | 功能描述:LVDS 接口集成電路 Quad Bus LVDS Transceiver RoHS:否 制造商:Texas Instruments 激勵器數(shù)量:4 接收機數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel |
| MAX9157EGJ-T | 功能描述:LVDS 接口集成電路 Quad Bus LVDS Transceiver RoHS:否 制造商:Texas Instruments 激勵器數(shù)量:4 接收機數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel |
| MAX9157EHJ | 功能描述:緩沖器和線路驅動器 RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| MAX9157EHJ+ | 功能描述:LVDS 接口集成電路 Quad Bus LVDS Transceiver RoHS:否 制造商:Texas Instruments 激勵器數(shù)量:4 接收機數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel |
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