參數(shù)資料
型號(hào)： MAX9214EUM+TD
廠商： Maxim Integrated Products
文件頁(yè)數(shù)： 2/17頁(yè)
文件大?。?/td> 0K
描述： IC DESERIALIZER PROG 48TSSOP
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 2,500
功能： 解串器
數(shù)據(jù)速率： 1.785Gbps
輸入類(lèi)型： LVDS
輸出類(lèi)型： LVTTL，LVCMOS
輸入數(shù)： 3
輸出數(shù)： 21
電源電壓： 3 V ~ 3.6 V
工作溫度： -40°C ~ 85°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 48-TFSOP（0.240"，6.10mm 寬）
供應(yīng)商設(shè)備封裝： 48-TSSOP
包裝： 帶卷 (TR)
MAX9210/MAX9214/MAX9220/MAX9222
Programmable DC-Balance
21-Bit Deserializers
10
______________________________________________________________________________________
the voltage rating of the capacitor. The typical LVDS dri-
ver output is 350mV centered on an offset voltage of
1.25V, making single-ended output voltages of 1.425V
and 1.075V. An LVDS receiver accepts signals from 0 to
2.4V, allowing approximately
±1V common-mode differ-
ence between the driver and receiver on a DC-coupled
link (2.4V - 1.425V = 0.975V and 1.075V - 0V = 1.075V).
Common-mode voltage differences may be due to
ground potential variation or common-mode noise. If
there is more than
±1V of difference, the receiver is not
guaranteed to read the input signal correctly and may
cause bit errors. AC-coupling filters low-frequency
ground shifts and common-mode noise and passes
high-frequency data. A common-mode voltage differ-
ence up to the voltage rating of the coupling capacitor
(minus half the differential swing) is tolerated. DC-bal-
anced coding of the data is required to maintain the dif-
ferential signal amplitude and limit jitter on an
AC-coupled link. A capacitor in series with each output
of the LVDS driver is sufficient for AC-coupling.
However, two capacitors—one at the serializer output
and one at the deserializer input—provide protection in
case either end of the cable is shorted to a high voltage.
Applications Information
Selection of AC-Coupling Capacitors
Voltage droop and the DSV of transmitted symbols
cause signal transitions to start from different voltage
levels. Because the transition time is finite, starting the
signal transition from different voltage levels causes
timing jitter. The time constant for an AC-coupled link
needs to be chosen to reduce droop and jitter to an
acceptable level.
The RC network for an AC-coupled link consists of the
LVDS receiver termination resistor (RT), the LVDS driver
output resistor (RO), and the series AC-coupling capac-
itors (C). The RC time constant for two equal-value
7 : 1
1 : 7
7
100
Ω
7 : 1
1 : 7
7
100
Ω
7 : 1
1 : 7
7
100
Ω
PLL
100
Ω
MAX9209
MAX9213
MAX9210
MAX9214
MAX9220
MAX9222
TxOUT
TxCLK OUT
RxIN
RxCLK IN
21:3 SERIALIZER
3:21 DESERIALIZER
PWRDWN
RxCLK OUT
RxOUT
PWRDWN
TxCLK IN
TxIN
TRANSMISSION LINE
Figure 11. DC-Coupled Link, Non-DC-Balanced Mode
相關(guān)PDF資料
PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MAX9215ETM 制造商:MAXIM 制造商全稱(chēng):Maxim Integrated Products 功能描述:Programmable DC-Balanced 21-Bit Serializers
MAX9215EUM 制造商:MAXIM 制造商全稱(chēng):Maxim Integrated Products 功能描述:Programmable DC-Balanced 21-Bit Serializers
MAX9216 制造商:MAXIM 制造商全稱(chēng):Maxim Integrated Products 功能描述:Programmable DC-Balance 21-Bit Deserializers
MAX9216ETM 制造商:MAXIM 制造商全稱(chēng):Maxim Integrated Products 功能描述:Programmable DC-Balance 21-Bit Deserializers
MAX9216EUM 制造商:MAXIM 制造商全稱(chēng):Maxim Integrated Products 功能描述:Programmable DC-Balance 21-Bit Deserializers
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