I2C Int" />
參數(shù)資料
型號(hào)： MAX9271GTJ/V+
廠商： Maxim Integrated Products
文件頁(yè)數(shù)： 20/49頁(yè)
文件大小： 0K
描述： IC SERIALIZER 16BIT GMSL 32TQFN
標(biāo)準(zhǔn)包裝： 60
系列： *
MAX9271
16-Bit GMSL Serializer with Coax or
STP Cable Drive
27
Maxim Integrated
I2C Interface
In I2C-to-I2C mode the serializer’s control-channel inter-
face sends and receives data through an I2C-compatible
2-wire interface. The interface uses a serial-data line
(SDA) and a serial-clock line (SCL) to achieve bidirec-
tional communication between master and slave(s). A
F
C master initiates all data transfers to and from the
device and generates the SCL clock that synchronizes
the data transfer. When an I2C transaction starts on the
local-side device’s control-channel port, the remote-side
device’s control-channel port becomes an I2C master
that interfaces with remote-side I2C perhipherals. The I2C
master must accept clock stretching, which is imposed
by the serializer (holding SCL low). The SDA and SCL
lines operate as both an input and an open-drain output.
Pullup resistors are required on SDA and SCL. Each
transmission consists of a START condition (Figure 6)
sent by a master, followed by the device’s 7-bit slave
address plus a R/W bit, a register address byte, one or
more data bytes, and finally a STOP condition.
START and STOP Conditions
Both SCL and SDA remain high when the interface is not
busy. A master signals the beginning of a transmission
with a START (S) condition by transitioning SDA from
high to low while SCL is high (see Figure 24). When the
master has finished communicating with the slave, it
issues a STOP (P) condition by transitioning SDA from
low to high while SCL is high. The bus is then free for
another transmission.
Bit Transfer
One data bit is transferred during each clock pulse
(Figure 25). The data on SDA must remain stable while
SCL is high.
Acknowledge
The acknowledge bit is a clocked 9th bit that the recipient
uses to handshake receipt of each byte of data (Figure 26).
Thus, each byte transferred effectively requires 9 bits.
The master generates the 9th clock pulse, and the recipi-
ent pulls down SDA during the acknowledge clock pulse.
The SDA line is stable low during the high period of the
clock pulse. When the master is transmitting to the slave
device, the slave device generates the acknowledge bit
because the slave device is the recipient. When the slave
device is transmitting to the master, the master generates
the acknowledge bit because the master is the recipient.
The device generates an acknowledge even when the
forward control channel is not active (not locked). To pre-
vent acknowledge generation when the forward control
channel is not active, set the I2CLOCACK.
Figure 23. Format Conversion Between GMSL UART and I2C with Register Address (I2CMETHOD = 1)
: MASTER TO SLAVE
SERIALIZER/DESERIALIZER
UART-TO-I2C CONVERSION OF READ PACKET (I2CMETHOD = 1)
UART-TO-I2C CONVERSION OF WRITE PACKET (I2CMETHOD = 1)
F
C
SERIALIZER/DESERIALIZER
F
C
SYNC FRAME
11
DEVICE ID + RD
REGISTER ADDRESS
NUMBER OF BYTES
SYNC FRAME
DEVICE ID + WR
REGISTER ADDRESS
NUMBER OF BYTES
DATA 0DATA NACK FRAME
ACK FRAME
DATA 0DATA N
DATA N
A
DATA 0
WA
DEV ID
S
AP
PERIPHERAL
S
11 18
88
1
17
11
8
11 1
7
DEV ID
RA
AA P
DATA 0DATA N
: SLAVE TO MASTER
S: START
P: STOP
A: ACKNOWLEDGE
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MAX9272 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:28-Bit GMSL Deserializer for Coax or STP Cable
MAX9272GTM/V+ 功能描述:串行器/解串器 - Serdes 1.5Gbps 28-bit Coax/STP deserializr RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64
MAX9272GTM/V+T 功能描述:串行器/解串器 - Serdes 1.5Gbps 28-bit Coax/STP deserializr RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64
MAX9272GTM+ 功能描述:串行器/解串器 - Serdes 1.5Gbps 28-bit Coax/STP deserializr RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64
MAX9272GTM+T 功能描述:串行器/解串器 - Serdes 1.5Gbps 28Bit Coax/STP deserializr RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64
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