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參數(shù)資料
| 型號： | MAX9316EUP |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | 1:5 Differential LVPECL/LVECL/HSTL Clock and Data Driver |
| 中文描述： | LINE DRIVER, PDSO20 |
| 封裝： | 4.40 MM, 0.65 MM PITCH, TSSOP-20 |
| 文件頁數(shù)： | 7/12頁 |
| 文件大?。?/td> | 214K |
| 代理商： | MAX9316EUP |
ed), allowing high-performance clock or data distribu-
tion in systems with a nominal +3.3V supply. For inter-
facing to differential LVECL, the V
EE
range is -3.0V to
-3.8V (with V
CC
grounded). Output levels are refer-
enced to V
CC
and are considered LVPECL or LVECL,
depending on the level of the V
CC
supply. With V
CC
connected to a positive supply and V
EE
connected to
ground, the outputs are LVPECL. The outputs are
LVECL when V
CC
is connected to ground and V
EE
is
connected to a negative supply.
Input Bias Resistors
When the inputs are open, the internal bias resistors set
the inputs to low state. The inverting input (
CLK
) is
biased with a 75k
pullup to V
CC
and a 75k
pulldown
to V
EE
. The noninverting inputs (CLK) and the single-
ended input (SCLK) are each biased with a 75k
pull-
down to V
EE
. The single-ended
EN
and SEL inputs are
each biased with a 60k
pulldown to V
EE
.
Differential Clock Input Limits
The maximum magnitude of the differential signal applied
to the differential clock input is 3.0V. This limit also
applies to the difference between any reference voltage
input and a single-ended input. Specifications for the high
and low voltages of a differential input (V
IHD
and V
ILD
)
and the differential input voltage (V
IHD
- V
ILD
) apply
simultaneously.
Single-Ended Clock Input and V
BB
The differential clock input can be configured to accept
a single-ended input. This is accomplished by connect-
ing the on-chip reference voltage, V
BB
, to the inverting
or noninverting input of the differential input as a refer-
ence. For example, the differential CLK,
CLK
input is
converted to a noninverting, single-ended input by con-
necting V
BB
to
CLK
and connecting the single-ended
input signal to CLK. Similarly, an inverting configuration
is obtained by connecting V
BB
to CLK and connecting
the single-ended input to
CLK
. With a differential input
configured as single ended (using V
BB
), the single-
ended input can be driven to V
CC
and V
EE
or with a
single-ended LVPECL/LVECL signal. Note that the sin-
gle-ended input must be least V
BB
±95mV or a differ-
ential input of at least 95mV to switch the outputs to the
V
OH
and V
OL
levels specified in the
DC Electrical
Characteristics
table.
When using the V
BB
reference output, bypass it with a
0.01μF ceramic capacitor to V
CC
. If the V
BB
reference
is not used, leave it open. The V
BB
reference can
source or sink 0.5mA. Use V
BB
only for an input that is
on the same device as the V
BB
reference.
Applications Information
Supply Bypassing
Bypass V
CC
to V
EE
with high-frequency surface-mount
ceramic 0.1μF and 0.01μF capacitors in parallel as
close to the device as possible, with the 0.01μF capaci-
tor closest to the device. Use multiple parallel vias to
minimize parasitic inductance. When using the V
BB
ref-
erence output, bypass it with a 0.01μF ceramic capaci-
tor to V
CC
(if the V
BB
reference is not used, it can be
left open).
Controlled-Impedance Traces
Input and output trace characteristics affect the perfor-
mance of the MAX9316. Connect input and output sig-
nals with 50
characteristic impedance traces.
Minimize the number of vias to prevent impedance dis-
continuities. Reduce reflections by maintaining the 50
characteristic impedance through cables and connec-
tors. Reduce skew within a differential pair by matching
the electrical length of the traces.
Output Termination
Terminate outputs with 50
to V
CC
- 2V or use an
equivalent Thevenin termination. When a single-ended
signal is taken from a differential output, terminate both
outputs. For example, if Q0 is used as a single-ended
output, terminate both Q0 and
Q0
.
Chip Information
TRANSISTOR COUNT: 616
PROCESS: Bipolar
M
1:5 Differential LVPECL/LVECL/HSTL
Clock and Data Driver
_______________________________________________________________________________________
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX9316EUP+ | 功能描述:時鐘驅(qū)動器及分配 RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| MAX9316EUP+T | 功能描述:時鐘驅(qū)動器及分配 RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| MAX9316EUP-T | 制造商:Maxim Integrated Products 功能描述:1:5 DIFFERENTIAL LVPECL/LVECL/HSTL CLOCK AND DATA DRIVER - Tape and Reel |
| MAX9316EWP | 功能描述:時鐘驅(qū)動器及分配 LVPECL/LVECL/HSTL Clock & Data Driver RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| MAX9316EWP+ | 功能描述:時鐘驅(qū)動器及分配 LVPECL/LVECL/HSTL Clock & Data Driver RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
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