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參數(shù)資料
| 型號： | MAX9320BESA |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 1:2 Differential PECL/ECL/LVPECL/LVECL Clock and Data Driver |
| 中文描述： | LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8 |
| 封裝： | SOIC-8 |
| 文件頁數(shù)： | 5/7頁 |
| 文件大小： | 120K |
| 代理商： | MAX9320BESA |
M
1:2 Differential PECL/ECL/LVPECL/LVECL
Clock and Data Driver
_______________________________________________________________________________________
5
Typical Operating Characteristics (continued)
(V
CC
= 5V, V
EE
= 0, input transition time = 125ps (20% to 80%), V
IHD
= V
CC
- 1V, V
ILD
= V
CC
- 1.5V, f
IN
= 1.5GHz, outputs loaded with
50
to V
CC
- 2V, T
A
= +25
°
C, unless otherwise noted.)
Pin Description
PIN
1
2
3
4
5
6
7
NAME
Q0
Q0
Q1
Q1
V
EE
D
D
FUNCTION
Noninverting Q0 Output. Typically terminate with 50
resistor to V
CC
- 2V.
Inverting Q0 Output. Typically terminate with 50
resistor to V
CC
- 2V.
Noninverting Q1 Output. Typically terminate with 50
resistor to V
CC
- 2V.
Inverting Q1 Output. Typically terminate with 50
resistor to V
CC
- 2V.
Negative Supply Voltage
Inverting Differential Input. 50k
pullup to V
CC
and 100k
pulldown to V
EE
.
Noninverting Differential Input. 80k
pullup to V
CC
and 60k
pulldown to V
EE
.
Positive Supply Voltage. Bypass from V
CC
to V
EE
with 0.1μF and 0.01μF ceramic capacitors. Place the
capacitors as close to the device as possible with the smaller value capacitor closest to the device.
8
V
CC
PROPAGATION DELAY vs. TEMPERATURE
M
TEMPERATURE (
°
C)
P
60
35
-15
10
170
180
190
200
210
220
230
240
160
-40
85
t
PLHD
t
PHLD
PROPAGATION DELAY vs. HIGH VOLTAGE
OF DIFFERENTIAL INPUT, V
IHD
M
V
IHD
(V)
P
5.2
4.8
4.4
4.0
3.6
3.2
2.8
2.4
2.0
1.6
195
200
205
210
215
220
190
1.2
5.6
t
PLHD
t
PHLD
V
IHD
- V
ILD
= 0.5V
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|---|---|
| MAX9320BESA+ | 制造商:Maxim Integrated Products 功能描述:LINE TRANSMITTER 1TX 8SOIC N - Rail/Tube |
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