參數(shù)資料
型號(hào)： MAX9322
廠商： Maxim Integrated Products, Inc.
英文描述： LVECL/LVPECL 1:15 Differential Divide-by-1/Divide-by-2 Clock Driver
中文描述： LVECL/LVPECL 1:15差分、除1/除2、時(shí)鐘驅(qū)動(dòng)器
文件頁(yè)數(shù)： 5/9頁(yè)
文件大?。?/td> 173K
代理商： MAX9322
M
1:5 Clock Driver with Selectable
LVPECL Inputs and LVDS Outputs
_______________________________________________________________________________________
5
Typical Operating Characteristics (continued)
(V
CC
- GND = 2.5V, outputs terminated with 100
±
1%, f
IN
= 1.0GHz, input transition time = 125ps (20% to 80%),V
IHD
= V
CC
- 1.0V,
V
ILD
= V
CC
- 1.5V, unless otherwise noted.)
PROPAGATION DELAY vs. HIGH VOLTAGE
OF DIFFERENTIAL INPUT (V
IHD
)
M
V
IHD
(V)
P
3.0
2.7
2.4
2.1
1.8
1.5
310
330
350
370
390
290
1.2
3.3
PROPAGATION DELAY vs. TEMPERATURE
M
TEMPERATURE (
°
C)
P
60
35
10
-15
320
340
360
380
400
300
-40
85
Pin Description
PIN
1
2
3
4
5
6
7
8
9
10
11
NAME
Q0
Q0
Q1
Q1
Q2
Q2
Q3
Q3
Q4
Q4
GND
FUNCTION
Noninverting Differential Output 0. Typically terminated with 100
to
Q0
.
Inverting Differential Output 0. Typically terminated with 100
to Q0.
Noninverting Differential Output 1. Typically terminated with 100
to
Q1
.
Inverting Differential Output 1. Typically terminated with 100
to Q1.
Noninverting Differential Output 2. Typically terminated with 100
to
Q2
.
Inverting Differential Output 2. Typically terminated with 100
to Q2.
Noninverting Differential Output 3. Typically terminated with 100
to
Q3
.
Inverting Differential Output 3. Typically terminated with 100
to Q3.
Noninverting Differential Output 4. Typically terminated with 100
to
Q4
.
Inverting Differential Output 4. Typically terminated with 100
to Q4.
Ground
12
CLKSEL
Clock Select Input. Drive low to select the CLK0,
CLK0
input. Drive high to select the CLK1,
CLK1
input. Internal 60k
pulldown to GND.
Noninverting Differential Clock Input 0. Internal 75k
pulldown to GND.
Inverting Differential Clock Input 0. Internal 75k
pullup to V
CC
and 75k
pulldown to GND.
Internally Connect. Do not connect externally.
Noninverting Differential Input 1. Internal 75k
pulldown to GND.
Inverting Differential Input 1. Internal 75k
pullup to V
CC
and 75k
pulldown to GND.
13
14
15
16
17
CLK0
CLK0
I.C.
CLK1
CLK1
相關(guān)PDF資料
PDF描述
MAX9323 One-to-Four LVCMOS-to-LVPECL Output Clock and Data Driver
MAX9324 One-to-Five LVPECL/LVCMOS Output Clock and Data Driver
MAX9325 2:8 Differential LVPECL/LVECL/HSTL Clock and Data Driver
MAX9326 1:9 Differential LVPECL/LVECL/HSTL Clock and Data Driver
MAX9382EVKIT Evaluation Kit for the MAX9382/MAX9383
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MAX9322ECY+ 制造商:Maxim Integrated Products 功能描述:DIFFERENTIAL DIVIDE-BY-1/DIVIDE-BY-2 CLOCK DRVR 52TQFP - Rail/Tube
MAX9322ECY+D 功能描述:通信集成電路 - 若干 RoHS:否 制造商:Maxim Integrated 類(lèi)型:Transport Devices 封裝 / 箱體:TECSBGA-256 數(shù)據(jù)速率:100 Mbps 電源電壓-最大:1.89 V, 3.465 V 電源電壓-最小:1.71 V, 3.135 V 電源電流:50 mA, 225 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Tube
MAX9322ECY+T 制造商:Maxim Integrated Products 功能描述:DIFFERENTIAL DIVIDE-BY-1/DIVIDE-BY-2 CLOCK DRVR 52TQFP - Tape and Reel
MAX9322ECY+TD 功能描述:通信集成電路 - 若干 RoHS:否 制造商:Maxim Integrated 類(lèi)型:Transport Devices 封裝 / 箱體:TECSBGA-256 數(shù)據(jù)速率:100 Mbps 電源電壓-最大:1.89 V, 3.465 V 電源電壓-最小:1.71 V, 3.135 V 電源電流:50 mA, 225 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Tube
MAX9322ECY-D 功能描述:通信集成電路 - 若干 LVECL/LVPECL 1:15 Differential Divide-by-1/Divide-by-2 Clock Driver RoHS:否 制造商:Maxim Integrated 類(lèi)型:Transport Devices 封裝 / 箱體:TECSBGA-256 數(shù)據(jù)速率:100 Mbps 電源電壓-最大:1.89 V, 3.465 V 電源電壓-最小:1.71 V, 3.135 V 電源電流:50 mA, 225 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Tube
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*