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參數(shù)資料
| 型號： | MAX9471ETP+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 6/13頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MULTI-PURPOSE CLK GEN 20-TQFN |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 類型： | 時鐘發(fā)生器 |
| PLL： | 是 |
| 輸入： | LVCMOS，晶體 |
| 輸出： | LVCMOS |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 2:4 |
| 差分 - 輸入:輸出： | 無/無 |
| 頻率 - 最大： | 200MHz |
| 除法器/乘法器： | 無/無 |
| 電源電壓： | 3 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-WQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 20-TQFN-EP（5x5） |
| 包裝： | 帶卷 (TR) |
MAX9471/MAX9472
Multiple-Output Clock Generators with
Dual PLLs and OTP
2
_______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
DC ELECTRICAL CHARACTERISTICS
(VDD = VDDA = +3.0V to +3.6V and TA = -40°C to +85°C. Typical values at VDD = VDDA = 3.3V, TA = +25°C, unless otherwise noted.)
(Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VDD to GND ...........................................................-0.3V to +4.0V
VDDA to AGND ......................................................-0.3V to +4.0V
AGND to GND ......................................................-0.3V to +0.3V
All Other Pins to GND ..................................-0.3V to VDD + 0.3V
Short-Circuit Duration
(all LVCMOS outputs)..............................................Continuous
ESD Protection (Human Body Model)..................................±2kV
Continuous Power Dissipation (TA = +70°C)
20-Pin TQFN (derate 21.3mW/°C above +70°C) .......2758mW
14-Pin TSSOP (derate 9.1mW/°C above +70°C) ......796.8mW
Storage Temperature Range .............................-65°C to +150°C
Maximum Junction Temperature .....................................+150°C
Operating Temperature Range ...........................-40°C to +85°C
Lead Temperature (soldering, 10s) .................................+300°C
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
LVCMOS INPUTS (
PD, X1 as a reference INPUT CLK)
Input High Level
VIH1
2.0
VDD
V
Input Low Level
VIL1
0
0.8
V
Input Current High Level
IIH1
VIN = VDD
20
A
Input Current Low Level
IIL1
VIN = 0
-20
A
THREE-LEVEL INPUTS (FS0, FS1, FS2, as FS2 = open)
Input High Level
VIH2
2.5
V
Input Low Level
VIL2
0.8
V
Input Open Level
VIO2
1.27
2.10
V
Input Current
IIL2, IIH2
VIL2 = 0 or VIH2 = VDD
-10
+10
A
SERIAL INTERFACE (SCL, SDA) (Note 2) (MAX9471)
Input High Level
VIH
0.7 x
VDD
V
Input Low Level
VIL
0.3 x
VDD
V
Input-Leakage Current
IIH, IIL
-1
+1
A
Low-Level Output
VOL
ISINK = 4mA
0.4
V
Input Capacitance
CI
(Note 3)
8.4
pF
CLOCK OUTPUTS (CLK_)
Output High Level
VOH
IOH = -4mA
VDD -
0.6
V
Output Low Level
VOL
IOL = 4mA
0.4
V
POWER SUPPLIES
Digital Power-Supply Voltage
VDD
3.0
3.6
V
Analog Power-Supply Voltage
VDDA
3.0
3.6
V
Total Current for Digital and
Analog Supplies
IDC
CLK1 at 125MHz and CLK2 at 74.1758MHz;
all outputs not loaded
12
mA
Total Power-Down Current
IPD
PD = low
60
A
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