參數(shù)資料
型號(hào): MAX9597EVKIT+
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 29/32頁(yè)
文件大?。?/td> 0K
描述: KIT EVAL FOR MAX9597
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 1
主要目的: SCART 接口
已用 IC / 零件: MAX9597
已供物品:
MAX9597
Low-Power Audio/Video Interface
for Single SCART Connectors
6
_______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(VVID = VAUD = 3.3V, V12 = 12V, GND = EP = 0, no load, TA = 0°C to +70°C, unless otherwise noted. Typical values are at
TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Input Low Voltage
VIL
0.3 x
VVID
V
Input Hysteresis
VHYS
0.05 x
VVID
V
Input Leakage Current
IIH, IIL
SCL and SDA have 40k
pullup resistors to
VVID
-1
+1
A
Input Capacitance
10
pF
Input Current
VVIDMAX = 3.6V
0.1VVID < SDA < 0.9VVIDMAX
0.1VVID < SCL < 0.9VVIDMAX
I/O pins of fast-mode devices must not
obstruct the SDA and SCL lines if VVID is
switched off
-10
+10
A
Output Low Voltage SDA
VOL
ISINK = 6mA
0.4
V
Serial-Clock Frequency
fSCL
0
400
kHz
Bus Free Time Between a STOP
and a START Condition
tBUF
1.3
s
Hold Time, (REPEATED) START
Condition
tHD, STA
0.6
s
Low Period of the SCL Clock
tLOW
1.3
s
High Period of the SCL Clock
tHIGH
0.6
s
Setup Time for a REPEATED
START Condition
tSU, STA
0.6
s
Data Hold Time
tHD, DAT
A master device must provide a hold time of
at least 300ns for the SDA signal (referred
to VIL of the SCL signal) to bridge the
undefined region of SCL’s falling edge
0
0.9
s
Data Setup Time
tHD, DAT
100
ns
Fall Time of SDA Transmitting
tF
CB = total capacitance of one bus line in pF
< 400pF; tR and tF measured between
0.3VVID and 0.7VVID (CB is in pF)
250
ns
Setup Time for STOP Condition
tSU, STO
0.6
s
Pulse Width of Spike Suppressed
tSP
Input filters on the SDA and SCL inputs
suppress noise spikes less than 50ns
050
ns
OTHER DIGITAL I/O
DEV_ADDR Low Level
0.3 x
VVID
V
DEV_ADDR High Level
0.7 x
VVID
V
DEV_ADDR Input Current
-1
+1
A
Note 1: All devices are 100% production tested at TA = +25°C and are guaranteed by design for TA = 0°C to +70°C as specified.
Note 2: Input operational amplifier configured in voltage follower configuration, unless otherwise noted.
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