參數(shù)資料
型號: MAX9611AUB+T
廠商: Maxim Integrated Products
文件頁數(shù): 10/20頁
文件大?。?/td> 0K
描述: IC 12BIT ADC OPAMP COMPAR 10UMAX
標準包裝: 2,500
放大器類型: 電流檢測
電路數(shù): 1
增益帶寬積: 2.5MHz
-3db帶寬: 4MHz
電流 - 輸入偏壓: 1µA
電壓 - 輸入偏移: 100µV
電流 - 電源: 1.6mA
電流 - 輸出 / 通道: 15mA
電壓 - 電源,單路/雙路(±): 2.7 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類型: *
封裝/外殼: *
供應商設備封裝: *
包裝: *
High-Side, Current-Sense Amplifiers with
12-Bit ADC and Op Amp/Comparator
MAX9611/MAX9612
18 _____________________________________________________________________________________
Base-Station PA Gain Control
While the MAX9611 is designed to control high-side
pFETs, the MAX9612 can be similarly used to control
low-side nFETs. For example the MAX9612 can be used
to control the DC bias point of power amplifier LDMOS
or GaN nFETs in base-station applications. The circuit
shown in Figure 4 also allows the option to apply nega-
tive bias voltages to the PA FET, which is required for
certain types of transistors for proper operation.
In the circuit shown, the nFET is in a linear mode of
operation to allow it to amplify high-frequency RF sig-
nals, while the MAX9612 sets the DC operating point.
The gain of the FET can be varied by changing its drain
current. This operating point can be varied by an exter-
nal DAC voltage that feeds the SET pin.
VNEG and VCLAMP together with R1, R2, and R3 set the
DC bias point limits for the PA transistor. VCLAMP is a
suitable positive voltage and VNEG is a suitable nega-
tive voltage. When VOUT = 0V, the gate voltage of the
PA FET is:
(
)
×
=
+
NEG
OUT
V
R2
V
R1 R2
When the OUT open-dran transistor is off, the gate volt-
age of the PA FET is:
(
)
+
=
+
++
NEG
CLAMP
GATE
V
R2 R3
V
R1
V
R1 R2 R3
RCOMP and CCOMP connected to the OUT pin compen-
sate the internal amplifier. Choose a corner frequency
of 100kHz.
Choose suitable RSENSE as required for the application.
The inductor isolates the DC measuring point of current
from the high-frequency AC signals through the PA FET,
as well as helping with the high-frequency gain.
Power-Supply Bypassing and Grounding
The MAX9611/MAX9612 share a common ground pin
for both the analog and digital on-chip circuitry. It is
therefore very important to properly bypass the VCC to
GND, and to have a solid low-noise ground plane on the
circuit board so as to minimize ground bounce. Bypass
VCC to GND with low ESR 0.1FF in parallel with a 4.7FF
ceramic capacitors to GND placed as close as possible
to the device.
Figure 4. Base-Station PA Gain Control
Chip Information
PROCESS: BiCMOS
MAX9612
CIN
VCC
RS-
RS+
A0
A1
SET
OUT
2.7V TO 5.5V
VNEG
VCLAMP
(OUTPUT SET TO OP-AMP MODE)
BASE-STATION PA GAIN CONTROL
RFIN
GND
I2C CLOCK
INPUT
I2C DATA
INPUT/OUTPUT
SCL
SDA
10-BIT
DAC
RCOMP
R2
R1
R3
N
CCOMP
RFOUT
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