參數(shù)資料
型號: MAX97002EWP+T
廠商: Maxim Integrated Products
文件頁數(shù): 15/37頁
文件大?。?/td> 0K
描述: IC AUDIO SUBSYSTEM 20WLP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 1
系列: DirectDrive®
類型: D 類
輸出類型: 1-通道(單聲道),帶立體聲耳機(jī)
在某負(fù)載時(shí)最大輸出功率 x 通道數(shù)量: 920mW x 1 @ 8 歐姆; 37mW x 2 @ 16 歐姆
電源電壓: 2.7 V ~ 5.5 V
特點(diǎn): 消除爆音,差分輸入,I²C,靜音,關(guān)閉,音量控制
安裝類型: 表面貼裝
供應(yīng)商設(shè)備封裝: 20-WLP
封裝/外殼: 20-WFBGA,WLBGA
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: MAX97002EWP+TDKR
Audio Subsystem with Mono Class D
Speaker and Class H Headphone Amplifiers
MAX97002
22
In addition to the cost and size disadvantages of
the DC-blocking capacitors required by conventional
headphone amplifiers, these capacitors limit the ampli-
fier’s low-frequency response and can distort the audio
signal. Previous attempts at eliminating the output-
coupling capacitors involved biasing the headphone
return (sleeve) to the DC-bias voltage of the headphone
amplifiers. This method raises some issues:
U
The sleeve is typically grounded to the chassis. Using
the midrail biasing approach, the sleeve must be isolat-
ed from system ground, complicating product design.
U
During an ESD strike, the amplifier’s ESD structures are
the only path to system ground. Thus, the amplifier must
be able to withstand the full energy from an ESD strike.
U
When using the headphone jack as a line out to other
equipment, the bias voltage on the sleeve may conflict
with the ground potential from other equipment, result-
ing in possible damage to the amplifiers.
Charge Pump
The MAX97002’s dual-mode charge pump generates
both the positive and negative power supply for the
headphone amplifier. To maximize effficiency, both the
charge pump’s switching frequency and output voltage
change based on signal level.
When the input signal level is less than 10% of VDD
the switching frequency is reduced to a low rate. This
minimizes switching losses in the charge pump. When
the input signal exceeds 10% of VDD, the switching fre-
quency increases to support the load current.
For input signals below 25% of VDD, the charge pump
generates Q(VDD/2) to minimize the voltage drop across
the amplifier’s power stage and thus improves efficiency.
Input signals that exceed 25% of VDD cause the charge
pump to output QVDD. The higher output voltage allows
for full output power from the headphone amplifier.
To prevent audible glitches when transitioning from the
Q
(VDD/2) output mode to the QVDD output mode, the
charge pump transitions very quickly. This quick change
draws significant current from VDD for the duration of the
transition. The bypass capacitor on VDD supplies the
required current and prevent droop on VDD.
The charge pump’s dynamic switching mode can be
turned off through the I2C interface. The charge pump
can then be forced to output either Q(VDD/2) or QVDD
regardless of input signal level.
Class H Operation
A Class H amplifier uses a Class AB output stage with
power supplies that are modulated by the output signal.
In the case of the MAX97002, two nominal power-supply
differentials of 1.8V (+0.9V to -0.9V) and 3.6V (+1.8V
to -1.8V) are available from the charge pump. Figure 7
shows the operation of the output voltage dependent
power supply.
Low-Power Mode
To minimize power consumption when using the head-
phone amplifier, enable the low-power mode. In this
mode, the headphone mixers and volume control are
bypassed and shutdown.
I2C Slave Address
The MAX97002 uses a slave address of 0x9A or
1001101R/W. The address is defined as the 7 most signifi-
cant bits (MSBs) followed by the read/write bit. Set the read/
write bit to 1 to configure the MAX97002 to read mode. Set
the read/write bit to 0 to configure the MAX97002 to write
mode. The address is the first byte of information sent to
the MAX97002 after the START (S) condition.
Figure 7. Class H Operation
32ms
1.8V
0.9V
VTH_H
VTH_L
-0.9V
-1.8V
HPVDD
HPVSS
OUTPUT
VOLTAGE
32ms
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