- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄2090 > MAX97002EWP+T (Maxim Integrated Products)IC AUDIO SUBSYSTEM 20WLP PDF資料下載
參數(shù)資料
| 型號： | MAX97002EWP+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 25/37頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC AUDIO SUBSYSTEM 20WLP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | DirectDrive® |
| 類型： | D 類 |
| 輸出類型： | 1-通道（單聲道），帶立體聲耳機(jī) |
| 在某負(fù)載時最大輸出功率 x 通道數(shù)量： | 920mW x 1 @ 8 歐姆; 37mW x 2 @ 16 歐姆 |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 特點(diǎn)： | 消除爆音，差分輸入，I²C，靜音，關(guān)閉，音量控制 |
| 安裝類型： | 表面貼裝 |
| 供應(yīng)商設(shè)備封裝： | 20-WLP |
| 封裝/外殼： | 20-WFBGA，WLBGA |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 其它名稱： | MAX97002EWP+TDKR |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁當(dāng)前第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁
Audio Subsystem with Mono Class D
Speaker and Class H Headphone Amplifiers
MAX97002
31
Early STOP Conditions
The MAX97002 recognizes a STOP (P) condition at any
point during data transmission except if the STOP condi-
tion occurs in the same high pulse as a START (S) condi-
tion. For proper operation, do not send a STOP condition
during the same SCL high pulse as the START condition.
Slave Address
The slave address is defined as the seven most sig-
nificant bits (MSBs) followed by the read/write bit. For
the MAX97002 the 7 MSBs are 1001101. Setting the
read/write bit to 1 (slave address = 0x9B) configures the
MAX97002 for read mode. Setting the read/write bit to 0
(slave address = 0x9A) configures the MAX97002 for write
mode. The address is the first byte of information sent to
the MAX97002 after the START condition.
Acknowledge
The acknowledge bit (ACK) is a clocked 9th bit that
the MAX97002 uses to handshake receipt each byte
of data when in write mode (Figure 9). The MAX97002
pulls down SDA during the entire master-generated 9th
clock pulse if the previous byte is successfully received.
Monitoring ACK allows for detection of unsuccessful
data transfers. An unsuccessful data transfer occurs
if a receiving device is busy or if a system fault has
occurred. In the event of an unsuccessful data transfer,
the bus master retries communication. The master pulls
down SDA during the 9th clock cycle to acknowledge
receipt of data when the MAX97002 is in read mode. An
acknowledge is sent by the master after each read byte
to allow data transfer to continue. A not-acknowledge is
sent when the master reads the final byte of data from
the MAX97002, followed by a STOP condition.
Write Data Format
A write to the MAX97002 includes transmission of a
START condition, the slave address with the R/W bit set
to 0, one byte of data to configure the internal register
address pointer, one or more bytes of data, and a STOP
condition. Figure 10 illustrates the proper frame format
for writing one byte of data to the MAX97002. Figure 11
illustrates the frame format for writing n-bytes of data to
the MAX97002.
The slave address with the R/W bit set to 0 indicates that
the master intends to write data to the MAX97002. The
MAX97002 acknowledges receipt of the address byte
during the master-generated 9th SCL pulse.
The second byte transmitted from the master configures
the MAX97002’s internal register address pointer. The
pointer tells the MAX97002 where to write the next byte
of data. An acknowledge pulse is sent by the MAX97002
upon receipt of the address pointer data.
The third byte sent to the MAX97002 contains the
data that is written to the chosen register. An acknowl-
edge pulse from the MAX97002 signals receipt of the
data byte. The address pointer autoincrements to the
next register address after each received data byte.
This autoincrement feature allows a master to write to
sequential registers within one continuous frame. The
master signals the end of transmission by issuing a
STOP condition. Register addresses greater than 0x09
are reserved. Do not write to these addresses.
Figure 9. Acknowledge
1
SCL
START
CONDITION
SDA
28
9
CLOCK PULSE FOR
ACKNOWLEDGMENT
ACKNOWLEDGE
NOT ACKNOWLEDGE
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MAX97003EWP+T | IC AUDIO SUBSYSTEM LN 20WLP |
| MAX9700AEUB+ | IC AMP AUDIO 1.6W MONO D 10MSOP |
| MAX9701ETG+T | IC AMP AUDIO PWR 2.2W D 24TQFN |
| MAX9702ETI+T | IC AMP AUDIO PWR 1.8W D 28TQFN |
| MAX9704ETJ+ | IC AMP AUDIO PWR 16W STER 32TQFN |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX97003EVKIT# | 功能描述:音頻 IC 開發(fā)工具 MAX97003 Eval Kit RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V |
| MAX97003EWP+ | 制造商:Maxim Integrated Products 功能描述:AUDIO SUBSYSTEM - Rail/Tube |
| MAX97003EWP+T | 功能描述:音頻放大器 Audio Subsystem RoHS:否 制造商:STMicroelectronics 產(chǎn)品:General Purpose Audio Amplifiers 輸出類型:Digital 輸出功率: THD + 噪聲: 工作電源電壓:3.3 V 電源電流: 最大功率耗散: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-64 封裝:Reel |
| MAX9700AEBC | 制造商:Maxim Integrated Products 功能描述:1.2W LOW EMI FILTERLESS CLASS D - Rail/Tube |
| MAX9700AEBC+ | 制造商:Maxim Integrated Products 功能描述:AUD AMP SPKR 1CH MONO 1.6W CLS-D 12UCSP - Rail/Tube |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。