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參數(shù)資料
| 型號： | MAX98089EVKIT#WLP |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 23/131頁 |
| 文件大?。?/td> | 0K |
| 描述： | KIT EVAL FOR MAX98089-WLP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | DirectDrive® |
| 主要目的： | 音頻編解碼器 |
| 嵌入式： | 是，DSP |
| 已用 IC / 零件： | MAX98089 |
| 主要屬性： | 2.8 V ~ 5.5 V 輸入電壓 |
| 已供物品： | 板，線纜，軟件 |
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Low-Power, Stereo Audio Codec
with FlexSound Technology
Slave Address
The slave address is defined as the seven most signifi-
cant bits (MSBs) followed by the read/write bit. For the
IC, the seven most significant bits are 0010000. Setting
the read/write bit to 1 (slave address = 0x21) configures
the IC for read mode. Setting the read/write bit to 0 (slave
address = 0x20) configures the ICs for write mode. The
address is the first byte of information sent to the IC after
the START condition.
Acknowledge
The acknowledge bit (ACK) is a clocked 9th bit that the
IC uses to handshake receipt each byte of data when
in write mode (Figure 35). The IC pulls down SDA dur-
ing the entire master-generated 9th clock pulse if the
previous byte is successfully received. Monitoring ACK
allows for detection of unsuccessful data transfers. An
unsuccessful data transfer occurs if a receiving device
is busy or if a system fault has occurred. In the event
of an unsuccessful data transfer, the bus master retries
communication. The master pulls down SDA during the
9th clock cycle to acknowledge receipt of data when the
IC is in read mode. An acknowledge is sent by the master
after each read byte to allow data transfer to continue. A
not acknowledge is sent when the master reads the final
byte of data from the IC, followed by a STOP condition.
Write Data Format
A write to the IC includes transmission of a START condi-
tion, the slave address with the R/W bit set to 0, one byte
of data to configure the internal register address pointer,
one or more bytes of data, and a STOP condition. Figure
36 illustrates the proper frame format for writing one byte
of data to the IC. Figure 37 illustrates the frame format for
writing n-bytes of data to the IC.
Figure 35. Acknowledge
Figure 36. Writing One Byte of Data to the ICs
Figure 37. Writing n-Bytes of Data to the ICs
1
SCL
START
CONDITION
SDA
28
9
CLOCK PULSE FOR
ACKNOWLEDGMENT
ACKNOWLEDGE
NOT ACKNOWLEDGE
1 BYTE
AUTOINCREMENT INTERNAL REGISTER ADDRESS POINTER
ACKNOWLEDGE FROM MAX98089
B7
B6
B5
B4
B3
B2
B1
B0
ACKNOWLEDGE FROM MAX98089
S
O
A
AP
SLAVE ADDRESS
R/W
REGISTER ADDRESS
DATA BYTE
ACKNOWLEDGE FROM MAX98089
SLAVE ADDRESS
REGISTER ADDRESS
DATA BYTE 1
AUTOINCREMENT INTERNAL REGISTER ADDRESS POINTER
1 BYTE
ACKNOWLEDGE FROM MAX98089
B7 B6 B5 B4 B3 B2 B1 B0
S
O
A
DATA BYTE n
1 BYTE
P
A
R/W
Maxim Integrated
119
MAX98089
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX98089EWY+ | 制造商:Maxim Integrated Products 功能描述:STEREO AUDIO CODEC WITH FLEXSOUND TUNING TECHNOLOGY AND BASI - Rail/Tube |
| MAX98089EWY+T | 功能描述:接口—CODEC Audio Codec RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| MAX98090AETL+ | 功能描述:接口—CODEC 5V 130mW Stereo Headphone Amp RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| MAX98090AETL+T | 功能描述:接口—CODEC 5V 130mW Stereo Headphone Amp RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| MAX98090AEWJ+ | 制造商:Maxim Integrated Products 功能描述:- Rail/Tube |
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