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參數(shù)資料
| 型號： | MAX9921AUB/V+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 10/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC HALL EFFECT SENSOR DL 10UMAX |
| 產(chǎn)品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 2,500 |
| 類型： | 霍爾效應傳感器 |
| 輸入類型： | 電壓 |
| 輸出類型： | 邏輯 |
| 接口： | 2 線 |
| 電流 - 電源： | 1.3mA |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-TFSOP，10-MSOP（0.118"，3.00mm 寬） |
| 供應商設備封裝： | 10-µMAX |
| 包裝： | 帶卷 (TR) |
MAX9921
Dual, 2-Wire Hall-Effect Sensor Interface
with Diagnostics
_______________________________________________________________________________________
3
Note 1: All DC specifications are 100% tested at TA = +25°C. AC specifications and specifications over -40°C to +125°C are guar-
anteed by design.
Note 2: CL is external load capacitance on the outputs for test only.
Note 3: These blanking times apply when the MAX9921 is operating in normal mode. Blanking times following power-up or startup
from shutdown mode are 20s longer.
Note 4: The following AC parameters change with the value of RISET: tBL, tRAMP, tDEL, fMAX, and PR. The typ values given are for
RISET = 63.4kΩ. The parameters tRAMP and fMAX increase 8%, and tDEL and PR decrease 8% with RISET = 59.0kΩ. The lim-
its for tBL and fMAX apply for both resistor values.
AC TIMING CHARACTERISTICS
(VBAT = 13.6V, VDIAG = 0, VOE = 5V, IN1 = IN2 = no connection, RISET = 63.4kΩ, RPU = 10kΩ at ERR, OUT1 and OUT2, TA = -40°C
to +125°C, unless otherwise noted. Typical values are at TA = +25°C.) (Notes 1, 2, and 4)
DC ELECTRICAL CHARACTERISTICS (continued)
(VBAT = 13.6V, VDIAG = 0, VOE = 5V, IN1 = IN2 = no connection, RISET = 63.4kΩ, RPU = 10kΩ at ERR, OUT1 and OUT2, TA = -40°C
to +125°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
IN1, IN2 Blanking Time at Hall
Switch Power-Up
tBL
IIH = -11.5mA to GND, time from VIN_ =
500mV until OUT_ high, CL = 20pF (Note 3)
50
140
s
IN1, IN2 Current Ramp Rate
After Turn-On
tRAMP
VIN = GND
3.8
mA/s
Delay from IN_ to OUT_ (Filter
Delay)
tDEL
From IIH to IIL or from IIL to IIH, CL = 20pF,
Figure 1
6.5
s
Delay from IN_ Fault to ERR
tERR
From IIL to ISC or from IIH to IOC, falling edge
only, CL = 20pF, Figure 1
31
ns
Delay from DIAG High to
OUT_ and ERR
tDLH
Rising edge of DIAG to falling or rising edge
of outputs, CL = 20pF, Figure 1
350
ns
Delay from DIAG Low to OUT_
and ERR
tDHL
Falling edge of DIAG to falling or rising edge
of outputs, CL = 20pF, Figure 1
1.6
s
Delay Difference Between
Rising and Falling Edges for
Both Channels
tDM
CHALL-BYPASS = 0.01F, IIH = -11.5mA and
IIL = -7.2mA, CL = 20pF
20
ns
Delay Difference Between
Channels
tCC
CHALL-BYPASS = 0.01F, IIH = -11.5mA and
IIL = -7.2mA, CL = 20pF
100
ns
Maximum Frequency on Hall
Inputs
fMAX
CHALL-BYPASS = 0.01F, IIH = -11.5mA and
IIL = -7.2mA, CL = 20pF
50
kHz
IN_ Pulse Length Rejected by
Filter to OUT_
PR
Figure 2
5.5
s
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
LOGIC I/O (OUT1, OUT2,
ERR, DIAG, and OE)
Output Voltage Low (ERR, OUT1,
OUT2)
VOL
Sink current = 1mA
0.4
V
Three-State Output Current (ERR,
OUT1, OUT2)
IOZ
VOE = 0V, 0
≤ VOUT_ ≤ 5V
±1
A
Input-Voltage High (DIAG, OE)
VIH
2.1
V
Input-Voltage Low (DIAG, OE)
VIL
0.8
V
Input Resistance to GND (DIAG, OE)
RIN
50
80
k
Ω
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