with Input VOS Trim and Output Op Amp 10" />
參數(shù)資料
型號: MAX9939AUB+T
廠商: Maxim Integrated Products
文件頁數(shù): 2/15頁
文件大?。?/td> 0K
描述: IC AMP PGA SPI VOS I/O 10MSOP
產品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 2,500
放大器類型: 可編程增益
電路數(shù): 2
輸出類型: 差分
轉換速率: 9 V/µs
增益帶寬積: 2.15MHz
電流 - 輸入偏壓: 1pA
電壓 - 輸入偏移: 1500µV
電流 - 電源: 3.4mA
電流 - 輸出 / 通道: 70mA
電壓 - 電源,單路/雙路(±): 2.9 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 10-TFSOP,10-MSOP(0.118",3.00mm 寬)
供應商設備封裝: 10-µMAX
包裝: 帶卷 (TR)
MAX9939
SPI Programmable-Gain Amplifier
with Input VOS Trim and Output Op Amp
10
Maxim Integrated
Differential-Input, Differential-Output PGA
The output amplifier can be configured so that the
MAX9939 operates as a differential-input, differential-
output programmable gain amplifier. As shown in
Figure 4, use a 10k
resistor between OUTA and INB,
and between INB and OUTB. Such a differential-output
configuration is ideal for use in low-voltage applications
that can benefit from the 2X output voltage dynamic
range when compared to single-ended output format.
Use of Output Operational Amplifier as TIA
CMOS inputs on the output op amp makes it ideal for
use as an input transimpedance amplifier (TIA) in cer-
tain current-output sensor applications. In such a situ-
ation, keep in mind that the inverting input operates at
fixed voltage of VCC/2. Use a high-value resistor as a
feedback gain element, and use a feedback capacitor
in parallel with this resistor if necessary to aid amplifi-
er stability in the presence of high photodiode or
cable capacitance. The output of this TIA can be rout-
ed to INA+ or INA- for further processing and signal
amplification.
Power-Supply Bypassing
Bypass VCC to GND with a 0.1F capacitor in parallel
with a 1F low-ESR capacitor placed as close as possi-
ble to the MAX9939.
INPUT OFFSET VOLTAGE
(V4 = 0 TRIMS POSITIVE, V4 = 1 TRIMS NEGATIVE)
V3:V0
VOS (mV)
0000
0
0001
1.3
0010
2.5
0011
3.8
0100
4.9
0101
6.1
0110
7.3
0111
8.4
1000
10.6
1001
11.7
1010
12.7
1011
13.7
1100
14.7
1101
15.7
1110
16.7
1111
17.6
Table 4. Input Offset-Voltage Trim
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