參數(shù)資料
型號(hào)： MB15F78SP
廠商： Fujitsu Limited
英文描述： Dual Serial Input PLL Frequency Synthesizer
中文描述： 雙串行輸入鎖相環(huán)頻率合成器
文件頁(yè)數(shù)： 8/27頁(yè)
文件大?。?/td> 296K
代理商： MB15F78SP
MB15F78SP
8
I
FUNCTIONAL DESCRIPTION
1.
Pulse swallow function
f
VCO
= [(P
×
N) + A]
×
f
OSC
÷
R
f
VCO
: Output frequency of external voltage controlled oscillator (VCO)
P
: Preset divide ratio of dual modulus prescaler (16 or 32 for TX-PLL, 32 or 64 for RX-PLL)
N
: Preset divide ratio of binary 11-bit programmable counter (3 to 2,047)
A
: Preset divide ratio of binary 7-bit swallow counter (0
≤
A
≤
127, A < N)
f
OSC
: Reference oscillation frequency (OSC
IN
input frequency)
R
: Preset divide ratio of binary 14-bit programmable reference counter (3 to 16,383)
2.
Serial data is entered using three pins, Data pin, Clock pin, and LE pin. Programmable dividers of TX/RX-PLL sec-
tions, programmable reference dividers of TX/RX-PLL sections are controlled individually.
Serial data of binary data is entered through Data pin.
On rising edge of Clock, one bit of serial data is transferred into the shift register. On a rising edge of load enable
signal, the data stored in the shift register is transferred to one of latch of them depending upon the control bit data
setting.
Serial Data Input
(1)
Shift Register Configuration
The programmable
reference counter
for the TX-PLL
The programmable
reference counter
for the RX-PL
The programmable
counter and the swallow
counter for the TX-PLL
The programmable
counter and the swallow
counter for the RX-PLL
CN1
0
1
0
1
CN2
0
0
1
1
(LSB)
(MSB)
CS
R1 to R14
T1, 2
CN1,2
X
: Charge pump currnet select bit
: Divide ratio setting bits for the programmable reference counter (3 to 16,383)
: Test purpose bit
: Control bit
: Dummy bits (Set “0” or “1”)
Note
: Data input with MSB first.
Programmable Reference Counter
Data Flow
1
2
3
4
5
6
7
8
9
10 11 12 13
14
15
16
17
18
19 20 21 22 23
CN1 CN2 T1 T2 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 CS X
X
X
X
相關(guān)PDF資料
PDF描述
MB15F78SPPFT Dual Serial Input PLL Frequency Synthesizer
MB15F78SPPV Dual Serial Input PLL Frequency Synthesizer
MB15F78UL Dual Serial Input PLL Frequency Synthesizer
MB15F78ULPFT Dual Serial Input PLL Frequency Synthesizer
MB15F78ULPVA Dual Serial Input PLL Frequency Synthesizer
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MB15F78SPPFT 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:Dual Serial Input PLL Frequency Synthesizer
MB15F78SPPV 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:Dual Serial Input PLL Frequency Synthesizer
MB15F78UL 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:Dual Serial Input PLL Frequency Synthesizer
MB15F78ULPFT 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:Dual Serial Input PLL Frequency Synthesizer
MB15F78ULPFT-G-BND-EFE1 功能描述:IC SYNTHESIZR PLL DL INP 20TSSOP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:2,000 系列:- 類型:PLL 頻率合成器 PLL:是 輸入:晶體 輸出:時(shí)鐘 電路數(shù):1 比率 - 輸入:輸出:1:1 差分 - 輸入:輸出:無(wú)/無(wú) 頻率 - 最大:1GHz 除法器/乘法器:是/無(wú) 電源電壓:4.5 V ~ 5.5 V 工作溫度:-20°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-LSSOP（0.175"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-SSOP 包裝:帶卷 (TR) 其它名稱:NJW1504V-TE1-NDNJW1504V-TE1TR
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