參數(shù)資料
型號(hào)： MB40568P-SK
廠商： FUJITSU LTD
元件分類(lèi)： ADC
英文描述： A/D Converter (1-channel, 8-bit low-power model with built-in clamp circuit)
中文描述： 1-CH 8-BIT FLASH METHOD ADC, PARALLEL ACCESS, PDIP22
封裝： SKINNY, PLASTIC, DIP-22
文件頁(yè)數(shù)： 16/24頁(yè)
文件大?。?/td> 175K
代理商： MB40568P-SK
16
MB40568
I
CLAMP CIRCUIT OPERATION
The MB40568’s internal clamp circuit is a peak-detection type circuit, which clamps compound synchronized signals
using the lowest sync point as clamp voltage (V
CLMP
) (see illustration below).
The clamp voltage is set at 0.6
×
V
CC
+ 0.2 V (typical).
If the clamp circuit is not used, the signal pins should be handled as follows:
Clamp Circuit
Pin name
Description
V
INC
Connect to GND
V
OUTC
Leave open
V
CLMP
Leave open
V
CCA
V
INC
A.GND
2 mA
C
CLMP
–
+
V
CCA
15
16
17
18
Video signal
V
OUTC
V
CLMP
V
INA
Bias circuit
3.2 V
A/D converter
(Pin No.: SK-DIP22P)
Signal level at V
INC
pin
A.GND
Signal level at V
INA
pin
V
CCA
= 5.0 V
V
CLMP
3.2 V
V
RB
3.0 V
相關(guān)PDF資料
PDF描述
MB40568PF A/D Converter (1-channel, 8-bit low-power model with built-in clamp circuit)
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