參數(shù)資料
型號： MB81117822A-125
廠商： Fujitsu Limited
英文描述： CMOS 2×1M ×8 Bit Synchronous Dynamic RAM(CMOS 2×1M ×8 位同步動(dòng)態(tài)RAM)
中文描述： 的CMOS 2 × 100萬× 8位同步動(dòng)態(tài)隨機(jī)存儲器（2 × 100萬的CMOS × 8位同步動(dòng)態(tài)RAM）的
文件頁數(shù)： 5/43頁
文件大小： 275K
代理商： MB81117822A-125
5
MB81117822A-125/-100/-84/-67
I
FUNCTION TRUTH TABLE
COMMAND TRUTH TABLE
Notes:
*1.
*2.
*3.
*4.
*5.
*6.
*7.
V = Valid, L = Logic Low, H = Logic High, X = either L or H.
All commands assumes no CSUS command on previous rising edge of clock.
All commands are assumed to be valid state transitions.
All inputs are latched on the rising edge of clock.
NOP and DESL commands have the same effect on the part.
BST command is effective only during full column burst read or write.
READ, READA, WRIT, and WRITA commands should only be issued after the corresponding bank has
been activated (ACTV command). Refer to STATE DIAGRAM.
ACTV command should only be issued after corresponding bank has been precharged (PRE or PALL
command).
Required after power up.
MRS command should only be issued after all banks have been precharged (PRE or PALL command).
Refer to STATE DIAGRAM.
*8.
*9.
*10.
Function
Notes Symbol
CKE
CS
RAS CAS
WE
A
(BA)
A
(AP)
A
9
A
to
8
A
7
A
to
0
n-1
n
Device Deselect
*5
DESL
H
X
H
X
X
X
X
X
X
X
No Operation
*5
NOP
H
X
L
H
H
H
X
X
X
X
Burst Stop
*6
BST
H
X
L
H
H
L
X
X
X
X
Read
*7
READ
H
X
L
H
L
H
V
L
X
V
Read with Auto-precharge
*7 READA
H
X
L
H
L
H
V
H
X
V
Write
*7
WRIT
H
X
L
H
L
L
V
L
X
V
Write with Auto-precharge
*7 WRITA
H
X
L
H
L
L
V
H
X
V
Bank Active (RAS)
*8
ACTV
H
X
L
L
H
H
V
V
V
V
Precharge Single Bank
PRE
H
X
L
L
H
L
V
L
X
X
Precharge All Banks
PALL
H
X
L
L
H
L
X
H
X
X
Mode Register Set
*9,10
MRS
H
X
L
L
L
L
V
L
V
V
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