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參數(shù)資料
| 型號(hào)： | MB8116165A-60 |
| 廠商： | Fujitsu Limited |
| 英文描述： | CMOS 1M ×16 BIT Hyper Page Mode Dynamic RAM(CMOS 1M ×16 位超級(jí)頁面存取模式動(dòng)態(tài)RAM) |
| 中文描述： | 的CMOS 100萬× 16位的超頁模式動(dòng)態(tài)RAM的CMOS（100萬× 16位超級(jí)頁面存取模式動(dòng)態(tài)內(nèi)存） |
| 文件頁數(shù)： | 1/30頁 |
| 文件大?。?/td> | 376K |
| 代理商： | MB8116165A-60 |
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DS05-10182-2E
FUJITSU SEMICONDUCTOR
DATA SHEET
MEMORY
CMOS 1M
HYPER PAGE MODE DYNAMIC RAM
×
16 BIT
MB8116165A-60/-70
CMOS 1,048,576
×
16 BIT Hyper Page Mode Dynamic RAM
I
DESCRIPTION
The Fujitsu MB8116165A is a fully decoded CMOS Dynamic RAM (DRAM) that contains 16,777,216 memory
cells accessible in 16-bit increments. The MB8116165A features a “hyper page” mode of operation whereby
high-speed random access of up to 256-bits of data within the same row can be selected. The MB8116165A
DRAM is ideally suited for mainframe, buffers, hand-held computers video imaging equipment, and other memory
applications where very low power dissipation and high bandwidth are basic requirements of the design. Since
the standby current of the MB8116165A is very small, the device can be used as a non-volatile memory in
equipment that uses batteries for primary and/or auxiliary power.
The MB8116165A is fabricated using silicon gate CMOS and Fujitsu’s advanced four-layer polysilicon and two-
layer aluminum process. This process, coupled with advanced stacked capacitor memory cells, reduces the
possibility of soft errors and extends the time interval between memory refreshes. Clock timing requirements
for the MB8116165A are not critical and all inputs are TTL compatible.
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PRODUCT LINE & FEATURES
Parameter
MB8116165A-60
60 ns max.
104 ns min.
30 ns max.
15 ns max.
25 ns min.
550 mW max.
11 mW max. (TTL level)/5.5 mW max. (CMOS level)
MB8116165A-70
70 ns max.
124 ns min.
35 ns max.
17 ns min.
30 ns min.
495 mW max.
RAS Access Time
Random Cycle Time
Address Access Time
CAS Access Time
Hyper Page Mode Cycle Time
Low Power Dissipation
Operating current
Standby current
1,048,576 words
×
16 bit organization
Silicon gate, CMOS, Advanced Stacked
Capacitor Cell
All input and output are TTL compatible
4096 refresh cycles every 65.6 ms
Self refresh function
This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields. However, it is advised that normal precautions be
taken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit.
Early Write or OE controlled write capability
RAS-only, CAS-before-RAS, or Hidden Refresh
Hyper Page Mode, Read-Modify-Write capability
On chip substrate bias generator for high
performance
相關(guān)PDF資料 |
PDF描述 |
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| MB8116165A-70 | CMOS 1M ×16 BIT Hyper Page Mode Dynamic RAM(CMOS 1M ×16 位超級(jí)頁面存取模式動(dòng)態(tài)RAM) |
| MB8116165B-50 | 1 M ×16 BIT Hyper Page Mode Dynamic RAM(CMOS 1 M ×16位超級(jí)頁面存取模式動(dòng)態(tài)RAM) |
| MB8116165B-60 | 1 M ×16 BIT Hyper Page Mode Dynamic RAM(CMOS 1 M ×16位超級(jí)頁面存取模式動(dòng)態(tài)RAM) |
| MB8116400A-50 | CMOS 4 M ×4 BIT Fast Page Mode DRAM(CMOS 4 M ×4 位快速頁面存取模式動(dòng)態(tài)RAM) |
| MB8116400A-60 | CMOS 4 M ×4 BIT Fast Page Mode DRAM(CMOS 4 M ×4 位快速頁面存取模式動(dòng)態(tài)RAM) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MB8116E | 制造商:FUJITSU 功能描述: 制造商:FUJITSU 功能描述:8116E |
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| MB8117800A-70 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:2 M X 8 BIT FAST PAGE MODE DYNAMIC RAM |
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